diff mbox series

firmware: xilinx: Update the zynqmp_pm_fpga_load() API

Message ID 20230503050158.1936467-1-nava.kishore.manne@amd.com
State New
Headers
Series firmware: xilinx: Update the zynqmp_pm_fpga_load() API |

Commit Message

Manne, Nava kishore May 3, 2023, 5:01 a.m. UTC 
  Update the zynqmp_pm_fpga_load() API to handle the firmware error’s
properly.

Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
---
 drivers/firmware/xilinx/zynqmp.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

Comments

Michal Simek May 12, 2023, 11:22 a.m. UTC | #1 
On 5/3/23 07:01, Nava kishore Manne wrote:
> Update the zynqmp_pm_fpga_load() API to handle the firmware error’s
> properly.
> 
> Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
> ---
>   drivers/firmware/xilinx/zynqmp.c | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index ce86a1850305..398ab86e2bec 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -942,8 +942,16 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
>    */
>   int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
>   {
> -	return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
> -				   upper_32_bits(address), size, flags, NULL);
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	int ret;
> +
> +	ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
> +				  upper_32_bits(address), size, flags,
> +				  ret_payload);
> +	if (ret_payload[0])
> +		return -ret_payload[0];
> +
> +	return ret;
>   }
>   EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
>   

Applied.
M
diff mbox series

Patch

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index ce86a1850305..398ab86e2bec 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -942,8 +942,16 @@  EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
  */
 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
 {
-	return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
-				   upper_32_bits(address), size, flags, NULL);
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
+				  upper_32_bits(address), size, flags,
+				  ret_payload);
+	if (ret_payload[0])
+		return -ret_payload[0];
+
+	return ret;
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);