From patchwork Mon May 1 08:43:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 88989 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2562302vqo; Mon, 1 May 2023 01:57:53 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6YLn4huzn9vMHEwoiTgI5PW4f2/HyGfdpLRKwDf7Piur0IHNZrh9CjeRMY5GnRPNICOQN+ X-Received: by 2002:a05:6a21:164d:b0:d3:89a1:76d1 with SMTP id no13-20020a056a21164d00b000d389a176d1mr14486272pzb.11.1682931473236; Mon, 01 May 2023 01:57:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682931473; cv=none; d=google.com; s=arc-20160816; b=dnYScu8/unDRh5gy4JrNbzreo7P9kc1h1zEi8nwy4sKHBLE+g8yzpesOxPqYx/+N+n IIgZ3HaIrkf1BahQZrl08PNgv+Kfm4uS/u+2MwRe+kZNG5lFMkT9A8Vmp8BmhwV6BOsU xJHbdOufSqDGwzQfQF0kjw5NZkqMHKiUBjKsPL0FfDbI5/sZDLJJcR6OrAQsTm91WuMx GnzOqv05TnnVJFj7jnfuUJ6wvYoPk4PLZdDX2nc51scmDljkI1X7rIjIUAYqfHb3VgD4 XDRoEcblk+LU9t/0xMKRHsFIV6QOfN5qBma6QMJX4JrRyZqvZEYuwFkcMtY3FeRq+7x8 GuLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=FMezA3s6OlHncbCOV4Cl8sjpGitFfZE4YMsw42pqalY=; b=uD3opeFVEa0uffuVcV+W6wUbgWDCfY9BF5GR7WpldzyzkbZiD1da5VPVhnOq9dsV3e O3sfx1mY9pdQNzmaJFyNV7f4aya7+qcflGxRXhdMfokgDy0yRcKnMNPpzgExXgllZQAn Y38ZZzfKGG702ZSZhoJCmJhc9Vv5xUHof1Wu21/5kyXNWUOVBOr45htp/P5ekhFGSLDy FOnlN/emy8/FEEOtlCZ+8tPQruPLRrNty3ycEdn68yCrHBwsqaOZ2H/y5J6noMiHanZQ PYYxQmH94LizF1QE4Hav7w8yqxyPEcVXhAqhvtAHO8tJgi7tCBiv2vh/aJQDY6BAEvRK ugtA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=bW20S5pr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id a21-20020a63e855000000b0051b70782bc7si27504649pgk.234.2023.05.01.01.57.38; Mon, 01 May 2023 01:57:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=bW20S5pr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232243AbjEAIoP (ORCPT + 99 others); Mon, 1 May 2023 04:44:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47896 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbjEAIoL (ORCPT ); Mon, 1 May 2023 04:44:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1099E77; Mon, 1 May 2023 01:44:09 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id BA6B1660316A; Mon, 1 May 2023 09:44:07 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1682930647; bh=kd7zQbdIfdiTDSN/o2vEbLYpgYwM2fkzUD6The1XAxo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bW20S5pr2VrH21jPW2bW1Qq5Q0y22PBXadsQF8Sck9ckohiicu7jgY3TzwR12RNqa hBm8yqUOBz6mqfbRmmVRKkJA1nsZQlpLPGmPsOxe4oFm1yu7IiU9uf5DgyiCnSkMRP Hptrs25IORrQB0mO5LKbVkZnRDUJ6QcCjw+ozvKQhXssT6W0EW5DI17AVbcAf8YEho u5uZ/qYegKtdT6fl1FdVDeeLBJPTmjUsWkK/jdbLfape3Ud4JWR8U8V05WB/CAbhtc uQ1s+3+t82PUZ0rSTULlcuuG5hfGY9D97hj3fRzYMX9GtKJ+ro9CRJZULcBgMe717t dYU9AwhdnDbqA== From: Cristian Ciocaltea To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Shreeya Patel , Kever Yang , Finley Xiao Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH 1/8] dt-bindings: nvmem: Convert rockchip-otp.txt to dt-schema Date: Mon, 1 May 2023 11:43:53 +0300 Message-Id: <20230501084401.765169-2-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> References: <20230501084401.765169-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1764681552181897798?= X-GMAIL-MSGID: =?utf-8?q?1764681552181897798?= Convert the Rockchip OTP memory bindings to dt-schema. Signed-off-by: Cristian Ciocaltea Reviewed-by: Heiko Stuebner --- .../bindings/nvmem/rockchip-otp.txt | 25 ------ .../bindings/nvmem/rockchip-otp.yaml | 83 +++++++++++++++++++ 2 files changed, 83 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt deleted file mode 100644 index 40f649f7c2e5..000000000000 --- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt +++ /dev/null @@ -1,25 +0,0 @@ -Rockchip internal OTP (One Time Programmable) memory device tree bindings - -Required properties: -- compatible: Should be one of the following. - - "rockchip,px30-otp" - for PX30 SoCs. - - "rockchip,rk3308-otp" - for RK3308 SoCs. -- reg: Should contain the registers location and size -- clocks: Must contain an entry for each entry in clock-names. -- clock-names: Should be "otp", "apb_pclk" and "phy". -- resets: Must contain an entry for each entry in reset-names. - See ../../reset/reset.txt for details. -- reset-names: Should be "phy". - -See nvmem.txt for more information. - -Example: - otp: otp@ff290000 { - compatible = "rockchip,px30-otp"; - reg = <0x0 0xff290000 0x0 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, - <&cru PCLK_OTP_PHY>; - clock-names = "otp", "apb_pclk", "phy"; - }; diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml new file mode 100644 index 000000000000..658ceed14ee2 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/rockchip-otp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip internal OTP (One Time Programmable) memory + +maintainers: + - Heiko Stuebner + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + enum: + - rockchip,px30-otp + - rockchip,rk3308-otp + + reg: + maxItems: 1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: otp + - const: apb_pclk + - const: phy + + resets: + maxItems: 1 + + reset-names: + items: + - const: phy + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + otp: efuse@ff290000 { + compatible = "rockchip,px30-otp"; + reg = <0x0 0xff290000 0x0 0x4000>; + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, + <&cru PCLK_OTP_PHY>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTP_PHY>; + reset-names = "phy"; + #address-cells = <1>; + #size-cells = <1>; + + cpu_id: id@7 { + reg = <0x07 0x10>; + }; + + cpu_leakage: cpu-leakage@17 { + reg = <0x17 0x1>; + }; + + performance: performance@1e { + reg = <0x1e 0x1>; + bits = <4 3>; + }; + }; + };