[v2,1/6] dt-bindings: usb: qcom,dwc3: Add bindings for SA8775P

Message ID 20230428130824.23803-2-quic_shazhuss@quicinc.com
State New
Headers
Series arm64: qcom: sa8775p: add support for USB |

Commit Message

Shazad Hussain April 28, 2023, 1:08 p.m. UTC
  Add the compatible string for SA8775P SoC from Qualcomm.

Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
---
 .../devicetree/bindings/usb/qcom,dwc3.yaml    | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)
  

Comments

Krzysztof Kozlowski April 28, 2023, 1:27 p.m. UTC | #1
On 28/04/2023 15:08, Shazad Hussain wrote:
> Add the compatible string for SA8775P SoC from Qualcomm.
> 
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---

(...)

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,sa8775p-dwc3
> +    then:
> +      properties:
> +        interrupts:
> +          minItems: 3
> +          maxItems: 4
> +        interrupt-names:
> +          minItems: 3
> +          items:
> +            - const: pwr_event
> +            - const: dp_hs_phy_irq
> +            - const: dm_hs_phy_irq
> +            - const: ss_phy_irq

Why the last interrupt line is optional? Is it really optional?

Best regards,
Krzysztof
  
Shazad Hussain April 28, 2023, 1:59 p.m. UTC | #2
Hi Krzysztof,

On 4/28/2023 6:57 PM, Krzysztof Kozlowski wrote:
> On 28/04/2023 15:08, Shazad Hussain wrote:
>> Add the compatible string for SA8775P SoC from Qualcomm.
>>
>> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
>> ---
> 
> (...)
> 
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - qcom,sa8775p-dwc3
>> +    then:
>> +      properties:
>> +        interrupts:
>> +          minItems: 3
>> +          maxItems: 4
>> +        interrupt-names:
>> +          minItems: 3
>> +          items:
>> +            - const: pwr_event
>> +            - const: dp_hs_phy_irq
>> +            - const: dm_hs_phy_irq
>> +            - const: ss_phy_irq
> 
> Why the last interrupt line is optional? Is it really optional?
> 

Third usb controller i.e usb_2 supports only high speed, so I believe
ss_phy_irq is not required for that instance.

> Best regards,
> Krzysztof
> 

-Shazad
  
Krzysztof Kozlowski May 1, 2023, 6:42 a.m. UTC | #3
On 28/04/2023 15:08, Shazad Hussain wrote:
> Add the compatible string for SA8775P SoC from Qualcomm.
> 
> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
> ---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
  

Patch

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index d84281926f10..4a36e2b6c8fb 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -23,6 +23,7 @@  properties:
           - qcom,msm8998-dwc3
           - qcom,qcm2290-dwc3
           - qcom,qcs404-dwc3
+          - qcom,sa8775p-dwc3
           - qcom,sc7180-dwc3
           - qcom,sc7280-dwc3
           - qcom,sc8280xp-dwc3
@@ -180,6 +181,7 @@  allOf:
               - qcom,msm8953-dwc3
               - qcom,msm8996-dwc3
               - qcom,msm8998-dwc3
+              - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
               - qcom,sc7280-dwc3
               - qcom,sdm670-dwc3
@@ -455,6 +457,25 @@  allOf:
             - const: dm_hs_phy_irq
             - const: ss_phy_irq
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,sa8775p-dwc3
+    then:
+      properties:
+        interrupts:
+          minItems: 3
+          maxItems: 4
+        interrupt-names:
+          minItems: 3
+          items:
+            - const: pwr_event
+            - const: dp_hs_phy_irq
+            - const: dm_hs_phy_irq
+            - const: ss_phy_irq
+
 additionalProperties: false
 
 examples: