diff mbox series

[net,2/3] r8152: fix the poor throughput for 2.5G devices

Message ID 20230426122805.23301-402-nic_swsd@realtek.com
State New
Headers
Series r8152: fix 2.5G devices |

Commit Message

Hayes Wang April 26, 2023, 12:28 p.m. UTC 
  Fix the poor throughput for 2.5G devices, when changing the speed from
auto mode to force mode. This patch is used to notify the MAC when the
mode is changed.

Fixes: 195aae321c82 ("r8152: support new chips")
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
 drivers/net/usb/r8152.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Andrew Lunn April 27, 2023, 12:26 a.m. UTC | #1 
On Wed, Apr 26, 2023 at 08:28:04PM +0800, Hayes Wang wrote:
> Fix the poor throughput for 2.5G devices, when changing the speed from
> auto mode to force mode. This patch is used to notify the MAC when the
> mode is changed.
> 
> Fixes: 195aae321c82 ("r8152: support new chips")
> Signed-off-by: Hayes Wang <hayeswang@realtek.com>
> ---
>  drivers/net/usb/r8152.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
> index 08d1786135f2..3ecd4651ae29 100644
> --- a/drivers/net/usb/r8152.c
> +++ b/drivers/net/usb/r8152.c
> @@ -7554,6 +7554,11 @@ static void r8156_hw_phy_cfg(struct r8152 *tp)
>  				      ((swap_a & 0x1f) << 8) |
>  				      ((swap_a >> 8) & 0x1f));
>  		}
> +
> +		/*  set intr_en[3] */
> +		data = ocp_reg_read(tp, 0xa424);
> +		data |= BIT(3);
> +		ocp_reg_write(tp, 0xa424, data);

Please add #define for 0xa424. And a #define for BIT(3), just to
document what bit 3 is. Once we understand what bit 3 is, we might
then understand why this change makes 2.5G perform better. At the
moment all i see is magic.

       Andrew
diff mbox series

Patch

diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
index 08d1786135f2..3ecd4651ae29 100644
--- a/drivers/net/usb/r8152.c
+++ b/drivers/net/usb/r8152.c
@@ -7554,6 +7554,11 @@  static void r8156_hw_phy_cfg(struct r8152 *tp)
 				      ((swap_a & 0x1f) << 8) |
 				      ((swap_a >> 8) & 0x1f));
 		}
+
+		/*  set intr_en[3] */
+		data = ocp_reg_read(tp, 0xa424);
+		data |= BIT(3);
+		ocp_reg_write(tp, 0xa424, data);
 		break;
 	default:
 		break;
@@ -7949,6 +7954,11 @@  static void r8156b_hw_phy_cfg(struct r8152 *tp)
 		break;
 	}
 
+	/*  set intr_en[3] */
+	data = ocp_reg_read(tp, 0xa424);
+	data |= BIT(3);
+	ocp_reg_write(tp, 0xa424, data);
+
 	if (rtl_phy_patch_request(tp, true, true))
 		return;