diff mbox series

x86/CPU/AMD: Rename the spectral chicken

Message ID 20230425195024.17808-1-bp@alien8.de
State New
Headers
Series x86/CPU/AMD: Rename the spectral chicken |

Commit Message

Borislav Petkov April 25, 2023, 7:50 p.m. UTC 
  From: "Borislav Petkov (AMD)" <bp@alien8.de>

We've had enough fun with the spectral chicken bit - name it what it
really does: it suppresses non-branch predictions.

Rename defines to make it clear that it is Zen2 only.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
---
 arch/x86/include/asm/msr-index.h |  6 ++++--
 arch/x86/kernel/cpu/amd.c        | 22 +++++++++++-----------
 2 files changed, 15 insertions(+), 13 deletions(-)

Comments

Peter Zijlstra April 25, 2023, 8:59 p.m. UTC | #1 
On Tue, Apr 25, 2023 at 09:50:24PM +0200, Borislav Petkov wrote:
> From: "Borislav Petkov (AMD)" <bp@alien8.de>
> 
> We've had enough fun with the spectral chicken bit - name it what it
> really does: it suppresses non-branch predictions.
> 
> Rename defines to make it clear that it is Zen2 only.
> 
> No functional changes.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
> ---
>  arch/x86/include/asm/msr-index.h |  6 ++++--
>  arch/x86/kernel/cpu/amd.c        | 22 +++++++++++-----------
>  2 files changed, 15 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index ad35355ee43e..0094e6a1b553 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -625,8 +625,10 @@
>  /* Fam 17h MSRs */
>  #define MSR_F17H_IRPERF			0xc00000e9
>  
> -#define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
> -#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT	BIT_ULL(1)
> +/* Fam 17h, Zen2 MSRs */
> +#define MSR_ZEN2_DE_CFG2			0xc00110e3
> +#define MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED_BIT	1
> +#define MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED	BIT(MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED_BIT)

NAK, I had to write all this without *any* official communication from
AMD, mostly on hear-say.

This gets to be the spectral chicken forever more as punishment. Next
time AMD can try again, and if they manage to get their act together and
publish something before I get to write the code and invent a name for a
magical bit, they get to name it how they like.
Borislav Petkov April 25, 2023, 9:15 p.m. UTC | #2 
On Tue, Apr 25, 2023 at 10:59:44PM +0200, Peter Zijlstra wrote:
> This gets to be the spectral chicken forever more as punishment. Next
> time AMD can try again, and if they manage to get their act together and
> publish something before I get to write the code and invent a name for a
> magical bit, they get to name it how they like.

It is unlikely that you'll have to do that again.
Thomas Gleixner April 26, 2023, 9:14 a.m. UTC | #3 
On Tue, Apr 25 2023 at 23:15, Borislav Petkov wrote:

> On Tue, Apr 25, 2023 at 10:59:44PM +0200, Peter Zijlstra wrote:
>> This gets to be the spectral chicken forever more as punishment. Next
>> time AMD can try again, and if they manage to get their act together and
>> publish something before I get to write the code and invent a name for a
>> magical bit, they get to name it how they like.
>
> It is unlikely that you'll have to do that again.

That's a purely speculative assumption.
Borislav Petkov April 26, 2023, 9:21 a.m. UTC | #4 
On Wed, Apr 26, 2023 at 11:14:44AM +0200, Thomas Gleixner wrote:
> That's a purely speculative assumption.

No, it's not.
diff mbox series

Patch

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index ad35355ee43e..0094e6a1b553 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -625,8 +625,10 @@ 
 /* Fam 17h MSRs */
 #define MSR_F17H_IRPERF			0xc00000e9
 
-#define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3
-#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT	BIT_ULL(1)
+/* Fam 17h, Zen2 MSRs */
+#define MSR_ZEN2_DE_CFG2			0xc00110e3
+#define MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED_BIT	1
+#define MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED	BIT(MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED_BIT)
 
 /* Fam 16h MSRs */
 #define MSR_F16H_L2I_PERF_CTL		0xc0010230
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 571abf808ea3..70a41088e900 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -860,23 +860,23 @@  static void init_amd_bd(struct cpuinfo_x86 *c)
 	clear_rdrand_cpuid_bit(c);
 }
 
-void init_spectral_chicken(struct cpuinfo_x86 *c)
+void init_amd_zn2(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_CPU_UNRET_ENTRY
 	u64 value;
 
 	/*
-	 * On Zen2 we offer this chicken (bit) on the altar of Speculation.
+	 * Suppress speculation from the middle of a basic block, i.e.
+	 * non-branch predictions.
 	 *
-	 * This suppresses speculation from the middle of a basic block, i.e. it
-	 * suppresses non-branch predictions.
-	 *
-	 * We use STIBP as a heuristic to filter out Zen2 from the rest of F17H
+	 * STIBP is used as a heuristic to filter out Zen2 from the rest
+	 * of family 0x17.
 	 */
-	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && cpu_has(c, X86_FEATURE_AMD_STIBP)) {
-		if (!rdmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &value)) {
-			value |= MSR_ZEN2_SPECTRAL_CHICKEN_BIT;
-			wrmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);
+	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &&
+	     cpu_has(c, X86_FEATURE_AMD_STIBP)) {
+		if (!rdmsrl_safe(MSR_ZEN2_DE_CFG2, &value)) {
+			value |= MSR_ZEN2_DE_CFG2_SUPPRESS_NOBR_PRED;
+			wrmsrl_safe(MSR_ZEN2_DE_CFG2, value);
 		}
 	}
 #endif
@@ -949,7 +949,7 @@  static void init_amd(struct cpuinfo_x86 *c)
 	case 0x12: init_amd_ln(c); break;
 	case 0x15: init_amd_bd(c); break;
 	case 0x16: init_amd_jg(c); break;
-	case 0x17: init_spectral_chicken(c);
+	case 0x17: init_amd_zn2(c);
 		   fallthrough;
 	case 0x19: init_amd_zn(c); break;
 	}