Message ID | 20230425084010.15581-6-quic_devipriy@quicinc.com |
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State | New |
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Series |
Incremental patches on minimal boot support
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Commit Message
Devi Priya
April 25, 2023, 8:40 a.m. UTC
Drop unused bias_pll_ubi_nc_clk input to the clock controller.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
---
Changes in V3:
- Added <0> entry in place of bias_pll_ubi_nc_clk as suggested by
konrad to avoid ABI breakage.
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 7e0a16d490f9..e2d934fe18c2 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -16,12 +16,6 @@ #size-cells = <2>; clocks { - bias_pll_ubi_nc_clk: bias-pll-ubi-nc-clk { - compatible = "fixed-clock"; - clock-frequency = <353000000>; - #clock-cells = <0>; - }; - sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -131,7 +125,7 @@ reg = <0x01800000 0x80000>; clocks = <&xo_board_clk>, <&sleep_clk>, - <&bias_pll_ubi_nc_clk>, + <0>, <0>, <0>, <0>,