Message ID | 20230424194911.264850-4-heiko.stuebner@vrull.eu |
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State | New |
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Series |
Expose the isa-string via the AT_BASE_PLATFORM aux vector
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Commit Message
Heiko Stübner
April 24, 2023, 7:49 p.m. UTC
From: Heiko Stuebner <heiko.stuebner@vrull.eu> Already defined aux-vectors regarding the machine type are AT_PLATFORM and AT_BASE_PLATFORM. PPC already uses AT_BASE_PLATFORM to identify the real platform the system is running on, so do a similar thing on RISC-V and export the ISA string of the running machine via this aux-vector element. This way userspace can possibly adapt to extensions that allow it to run certain loads more performantly. Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> --- arch/riscv/include/asm/elf.h | 10 ++++++++++ arch/riscv/kernel/cpu.c | 12 ++++++++++++ 2 files changed, 22 insertions(+)
Comments
Hi Heiko, kernel test robot noticed the following build warnings: [auto build test WARNING on next-20230424] [also build test WARNING on v6.3] [cannot apply to soc/for-next linus/master kees/for-next/execve v6.3 v6.3-rc7 v6.3-rc6] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Heiko-Stuebner/RISC-V-create-ISA-string-separately-not-as-part-of-cpuinfo/20230425-035214 base: next-20230424 patch link: https://lore.kernel.org/r/20230424194911.264850-4-heiko.stuebner%40vrull.eu patch subject: [PATCH 3/4] RISC-V: export the ISA string of the running machine in the aux vector config: riscv-randconfig-r042-20230423 (https://download.01.org/0day-ci/archive/20230425/202304251544.rajXe0ut-lkp@intel.com/config) compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project 437b7602e4a998220871de78afcb020b9c14a661) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install riscv cross compiling tool for clang build # apt-get install binutils-riscv64-linux-gnu # https://github.com/intel-lab-lkp/linux/commit/3f82c51fa0f92c257313a0291c7a36cbdfdc5bb1 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Heiko-Stuebner/RISC-V-create-ISA-string-separately-not-as-part-of-cpuinfo/20230425-035214 git checkout 3f82c51fa0f92c257313a0291c7a36cbdfdc5bb1 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/kernel/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Link: https://lore.kernel.org/oe-kbuild-all/202304251544.rajXe0ut-lkp@intel.com/ All warnings (new ones prefixed by >>): >> arch/riscv/kernel/cpu.c:122:14: warning: function 'riscv_create_isa_string' has internal linkage but is not defined [-Wundefined-internal] static char *riscv_create_isa_string(void); ^ arch/riscv/kernel/cpu.c:140:12: note: used here isa_str = riscv_create_isa_string(); ^ 1 warning generated. vim +/riscv_create_isa_string +122 arch/riscv/kernel/cpu.c 120 121 const char *riscv_base_platform = NULL; > 122 static char *riscv_create_isa_string(void); 123
Hi Heiko, kernel test robot noticed the following build warnings: [auto build test WARNING on next-20230424] [also build test WARNING on v6.3] [cannot apply to soc/for-next linus/master kees/for-next/execve v6.3 v6.3-rc7 v6.3-rc6] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Heiko-Stuebner/RISC-V-create-ISA-string-separately-not-as-part-of-cpuinfo/20230425-035214 base: next-20230424 patch link: https://lore.kernel.org/r/20230424194911.264850-4-heiko.stuebner%40vrull.eu patch subject: [PATCH 3/4] RISC-V: export the ISA string of the running machine in the aux vector config: riscv-randconfig-r042-20230424 (https://download.01.org/0day-ci/archive/20230425/202304251516.YPx3mm3W-lkp@intel.com/config) compiler: riscv64-linux-gcc (GCC) 12.1.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/3f82c51fa0f92c257313a0291c7a36cbdfdc5bb1 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Heiko-Stuebner/RISC-V-create-ISA-string-separately-not-as-part-of-cpuinfo/20230425-035214 git checkout 3f82c51fa0f92c257313a0291c7a36cbdfdc5bb1 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/kernel/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Link: https://lore.kernel.org/oe-kbuild-all/202304251516.YPx3mm3W-lkp@intel.com/ All warnings (new ones prefixed by >>): >> arch/riscv/kernel/cpu.c:122:14: warning: 'riscv_create_isa_string' used but never defined 122 | static char *riscv_create_isa_string(void); | ^~~~~~~~~~~~~~~~~~~~~~~ vim +/riscv_create_isa_string +122 arch/riscv/kernel/cpu.c 120 121 const char *riscv_base_platform = NULL; > 122 static char *riscv_create_isa_string(void); 123
On Mon, Apr 24, 2023 at 09:49:10PM +0200, Heiko Stuebner wrote: > From: Heiko Stuebner <heiko.stuebner@vrull.eu> > > Already defined aux-vectors regarding the machine type are AT_PLATFORM > and AT_BASE_PLATFORM. PPC already uses AT_BASE_PLATFORM to identify the > real platform the system is running on, so do a similar thing on RISC-V > and export the ISA string of the running machine via this aux-vector > element. > > This way userspace can possibly adapt to extensions that allow it to > run certain loads more performantly. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> > --- > arch/riscv/include/asm/elf.h | 10 ++++++++++ > arch/riscv/kernel/cpu.c | 12 ++++++++++++ > 2 files changed, 22 insertions(+) > > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h > index 30e7d2455960..820ef627e83d 100644 > --- a/arch/riscv/include/asm/elf.h > +++ b/arch/riscv/include/asm/elf.h > @@ -78,6 +78,16 @@ extern unsigned long elf_hwcap; > > #define COMPAT_ELF_PLATFORM (NULL) > > +/* > + * ELF_PLATFORM indicates the ISA supported by the platform, but has > + * special meaning to ld.so . ^ stray space > + * Expose the ISA string including all usable extensions via > + * ELF_BASE_PLATFORM instead and allow userspace to adapt to them > + * if needed. > + */ > +#define ELF_BASE_PLATFORM (riscv_base_platform) > +extern const char *riscv_base_platform; > + > #ifdef CONFIG_MMU > #define ARCH_DLINFO \ > do { \ > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 06c2f587a176..71770563199f 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -118,8 +118,12 @@ static int riscv_cpuinfo_starting(unsigned int cpu) > return 0; > } > > +const char *riscv_base_platform = NULL; No need for the '= NULL' > +static char *riscv_create_isa_string(void); > + > static int __init riscv_cpuinfo_init(void) > { > + char *isa_str; > int ret; > > ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting", > @@ -129,6 +133,14 @@ static int __init riscv_cpuinfo_init(void) > return ret; > } > > + /* > + * Create the isa-string with the common set of extensions over > + * all harts, to expose as AT_BASE_PLATFORM in the aux vector. > + */ > + isa_str = riscv_create_isa_string(); > + if (!IS_ERR(isa_str)) > + riscv_base_platform = isa_str; > + > return 0; > } > arch_initcall(riscv_cpuinfo_init); > -- > 2.39.0 > Otherwise, Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 30e7d2455960..820ef627e83d 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -78,6 +78,16 @@ extern unsigned long elf_hwcap; #define COMPAT_ELF_PLATFORM (NULL) +/* + * ELF_PLATFORM indicates the ISA supported by the platform, but has + * special meaning to ld.so . + * Expose the ISA string including all usable extensions via + * ELF_BASE_PLATFORM instead and allow userspace to adapt to them + * if needed. + */ +#define ELF_BASE_PLATFORM (riscv_base_platform) +extern const char *riscv_base_platform; + #ifdef CONFIG_MMU #define ARCH_DLINFO \ do { \ diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 06c2f587a176..71770563199f 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -118,8 +118,12 @@ static int riscv_cpuinfo_starting(unsigned int cpu) return 0; } +const char *riscv_base_platform = NULL; +static char *riscv_create_isa_string(void); + static int __init riscv_cpuinfo_init(void) { + char *isa_str; int ret; ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting", @@ -129,6 +133,14 @@ static int __init riscv_cpuinfo_init(void) return ret; } + /* + * Create the isa-string with the common set of extensions over + * all harts, to expose as AT_BASE_PLATFORM in the aux vector. + */ + isa_str = riscv_create_isa_string(); + if (!IS_ERR(isa_str)) + riscv_base_platform = isa_str; + return 0; } arch_initcall(riscv_cpuinfo_init);