From patchwork Sun Apr 23 14:10:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melissa Wen X-Patchwork-Id: 86766 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2242098vqo; Sun, 23 Apr 2023 08:10:54 -0700 (PDT) X-Google-Smtp-Source: AKy350ad8tgi99SDPyASFgsb/y+LshzrPfe8mp433vz+W0qzOs/3WO9l1NPfPEeM7Owb1JCmkDel X-Received: by 2002:a05:6a00:1496:b0:63d:4407:b6c with SMTP id v22-20020a056a00149600b0063d44070b6cmr15784910pfu.7.1682262654463; Sun, 23 Apr 2023 08:10:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1682262654; cv=none; d=google.com; s=arc-20160816; b=Vt1Ca7HNnuwKI6vmpbeNoyFVHFPFCyI48z2tD+4wjveHKWae79J9juwbAKz7crYob5 LrDrMCtLW5kQGF7C5r1hRqnyZpSt7erH+GMGOUkh2ibkj/et8rA9dRbq73HB1CHgehZc DfKBJiQqC2q8m82OuYuQaMAr0lAmpnKeKE3JsZpVD+oUTKDAEsgekR+CpTB0VoQWXWb5 QVI2R5/rL7xMO+bjwv/W4WuSsS94Iq0hvXSq/XAV/zrIf1KTBQnRDbr0hGWYBflLfAeQ pxOpX9+7UdK67il0Nb9OkXufZq3H1mHgDpL8/znVv81iVk01zp+7x0IhksZgGMblop3v 1Mqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Muyaau4YvOlEED9C4uAM8ak2NdSxTNzeXN9VmH4gVg8=; b=EprT+W/7cH7PDRYMUZywMOULjlsmXUAuiCYqp0w+ypINNkrK25Pd9nMEXzl36GitEA 2JkgNvPH2BD4mp2RLOEBdO8Q6HS3+RHc6QbVD12dq/OAUu0EHnhgQcYFSeGPHJhpAjk/ tx8tL/fNCp0PkP/vrrhYlgeyqfOdBDo9TDNiQQqZGseRg/dmy7e90tGRpJQBgb4scCkX ofQ9/R8hTKFpR96T+lywQToHZdmGMLotxY63RzBy/2SMP7qd17SdTL1GzUvUqXlLqOQ9 r9ZI01ylrP93H0yBtX/N7MzvIMY9sSY9pma1S3OZYnX/YFfXqvKnSHjObQxznJqGAQTe carQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="RIi/I6X7"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b11-20020aa7950b000000b0063b843131b1si8882349pfp.324.2023.04.23.08.10.39; Sun, 23 Apr 2023 08:10:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@igalia.com header.s=20170329 header.b="RIi/I6X7"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229694AbjDWOt2 (ORCPT + 99 others); Sun, 23 Apr 2023 10:49:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230325AbjDWOtX (ORCPT ); Sun, 23 Apr 2023 10:49:23 -0400 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57FE82D50 for ; Sun, 23 Apr 2023 07:49:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=Muyaau4YvOlEED9C4uAM8ak2NdSxTNzeXN9VmH4gVg8=; b=RIi/I6X7R9U2EXTQ/46iYBOgt/ Q16kxpKaEe9OCsrh6q1xeW46Kdite61TIWCNgJO7BP2xVORvhdoAlVp/FPTGO1UEsL0YSP6HvsX6v 3DVGj2y8myl1uSjUAxLlH3PWtJPvmgwJQts9Jk9zsMX/3ZhuXm5nEupcNFflaIaSy/aL6UNK4x0/n PHuvrrunJQIMhtBoZovf0grLgxPWY1blvEKTahV9ca8F1GuZkloaqyjbURld8CZJ7A5l+AYaeFDzd nrjgbi5Uuf6UaEvPqJKVA/r8qHHpGLEnnXsh2aub327MWsVnlW/v5DIy0yOLKtwbrayNuePqlougm yQArAa1g==; Received: from nat-wifi.fi.muni.cz ([147.251.43.9] helo=killbill.fi.muni.cz) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1pqaSy-00ANVs-8n; Sun, 23 Apr 2023 16:13:24 +0200 From: Melissa Wen To: amd-gfx@lists.freedesktop.org, Harry Wentland , Rodrigo Siqueira , sunpeng.li@amd.com, Alex Deucher , dri-devel@lists.freedesktop.org, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: Joshua Ashton , Sebastian Wick , Xaver Hugl , Shashank Sharma , Nicholas Kazlauskas , sungjoon.kim@amd.com, Alex Hung , Melissa Wen , linux-kernel@vger.kernel.org Subject: [RFC PATCH 26/40] drm/amd/display: add CRTC shaper LUT support to amd color pipeline Date: Sun, 23 Apr 2023 13:10:38 -0100 Message-Id: <20230423141051.702990-27-mwen@igalia.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230423141051.702990-1-mwen@igalia.com> References: <20230423141051.702990-1-mwen@igalia.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763980245107457388?= X-GMAIL-MSGID: =?utf-8?q?1763980245107457388?= Now, we can use DRM CRTC shaper LUT to delinearize and/or normalize the color space for a more efficient 3D LUT support (so far, only for DRM atomic color mgmt). If a degamma 1D LUT is passed to linearize the color space, a custom shaper 1D LUT can be used before applying 3D LUT. NOTE: although DRM CRTC shaper and 3D LUTs are optional properties, from our tests, AMD HW doesn't allow 3D LUT when shaper LUT is set to BYPASS (without user shaper LUT) Signed-off-by: Melissa Wen --- .../amd/display/amdgpu_dm/amdgpu_dm_color.c | 81 +++++++++---------- 1 file changed, 38 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c index 672ca5e9e59c..ff29be3929af 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c @@ -443,46 +443,26 @@ static void amdgpu_dm_atomic_lut3d(const struct drm_color_lut *drm_lut, } } -/** - * __set_input_tf - calculates the input transfer function based on expected - * input space. - * @func: transfer function - * @lut: lookup table that defines the color space - * @lut_size: size of respective lut. - * - * Returns: - * 0 in case of success. -ENOMEM if fails. - */ -static int __set_input_tf(struct dc_transfer_func *func, - const struct drm_color_lut *lut, uint32_t lut_size) +static int amdgpu_dm_atomic_shaper_lut(const struct drm_color_lut *shaper_lut, + uint32_t shaper_size, + struct dc_transfer_func *func_shaper) { - struct dc_gamma *gamma = NULL; - bool res; - - gamma = dc_create_gamma(); - if (!gamma) - return -ENOMEM; - - gamma->type = GAMMA_CUSTOM; - gamma->num_entries = lut_size; - - __drm_lut_to_dc_gamma(lut, gamma, false); - - res = mod_color_calculate_degamma_params(NULL, func, gamma, true); - dc_gamma_release(&gamma); + int ret = 0; - return res ? 0 : -ENOMEM; -} + if (shaper_size) { + /* If DRM shaper LUT is set, we assume a linear color space + * (linearized by DRM degamma 1D LUT or not) + */ + func_shaper->type = TF_TYPE_DISTRIBUTED_POINTS; + func_shaper->tf = TRANSFER_FUNCTION_LINEAR; -static int amdgpu_dm_atomic_shaper_lut(struct dc_transfer_func *func_shaper) -{ - /* We don't get DRM shaper LUT yet. We assume the input color space is already - * delinearized, so we don't need a shaper LUT and we can just BYPASS - */ - func_shaper->type = TF_TYPE_BYPASS; - func_shaper->tf = TRANSFER_FUNCTION_LINEAR; + ret = __set_output_tf(func_shaper, shaper_lut, shaper_size, false); + } else { + func_shaper->type = TF_TYPE_BYPASS; + func_shaper->tf = TRANSFER_FUNCTION_LINEAR; + } - return 0; + return ret; } /* amdgpu_dm_atomic_shaper_lut3d - set DRM CRTC shaper LUT and 3D LUT to DC @@ -530,7 +510,8 @@ static int amdgpu_dm_atomic_shaper_lut3d(struct dc *dc, amdgpu_dm_atomic_lut3d(drm_lut3d, drm_lut3d_size, lut3d_func); - return amdgpu_dm_atomic_shaper_lut(func_shaper); + return amdgpu_dm_atomic_shaper_lut(drm_shaper_lut, + drm_shaper_size, func_shaper); } /** @@ -562,12 +543,22 @@ static uint32_t amdgpu_dm_get_lut3d_size(struct amdgpu_device *adev, int amdgpu_dm_verify_lut3d_size(struct amdgpu_device *adev, const struct drm_crtc_state *crtc_state) { - const struct drm_color_lut *lut3d = NULL; struct dm_crtc_state *acrtc_state = to_dm_crtc_state(crtc_state); + const struct drm_color_lut *shaper = NULL, *lut3d = NULL; uint32_t exp_size, size; - exp_size = amdgpu_dm_get_lut3d_size(adev, MAX_COLOR_3DLUT_ENTRIES); + /* shaper LUT is only available if 3D LUT color caps*/ + exp_size = amdgpu_dm_get_lut3d_size(adev, MAX_COLOR_LUT_ENTRIES); + shaper = __extract_blob_lut(acrtc_state->shaper_lut, &size); + if (shaper && size != exp_size) { + DRM_DEBUG_DRIVER( + "Invalid Shaper LUT size. Should be %u but got %u.\n", + exp_size, size); + return -EINVAL; + } + + exp_size = amdgpu_dm_get_lut3d_size(adev, MAX_COLOR_3DLUT_ENTRIES); lut3d = __extract_blob_lut(acrtc_state->lut3d, &size); if (lut3d && size != exp_size) { @@ -652,14 +643,15 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc, bool is_legacy; int r; #ifdef CONFIG_STEAM_DECK - const struct drm_color_lut *lut3d; - uint32_t lut3d_size; + const struct drm_color_lut *shaper_lut, *lut3d; + uint32_t shaper_size, lut3d_size; r = amdgpu_dm_verify_lut3d_size(adev, &crtc->base); if (r) return r; lut3d = __extract_blob_lut(crtc->lut3d, &lut3d_size); + shaper_lut = __extract_blob_lut(crtc->shaper_lut, &shaper_size); #endif r = amdgpu_dm_verify_lut_sizes(&crtc->base); @@ -711,11 +703,14 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc, } else { #ifdef CONFIG_STEAM_DECK lut3d_size = lut3d != NULL ? lut3d_size : 0; + shaper_size = shaper_lut != NULL ? shaper_size : 0; r = amdgpu_dm_atomic_shaper_lut3d(adev->dm.dc, ctx, stream, - NULL, 0, + shaper_lut, shaper_size, lut3d, lut3d_size); - if (r) + if (r) { + DRM_DEBUG_DRIVER("Failed on shaper/3D LUTs setup\n"); return r; + } #endif /* Note: OGAM is disabled if 3D LUT is successfully programmed. * See params and set_output_gamma in