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(fttx-pool-217.61.159.143.bambit.de [217.61.159.143]) by mxbox2.masterlogin.de (Postfix) with ESMTPSA id 442C410072A; Fri, 21 Apr 2023 13:20:56 +0000 (UTC) From: Frank Wunderlich To: linux-mediatek@lists.infradead.org Cc: Frank Wunderlich , Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , AngeloGioacchino Del Regno , Srinivas Kandagatla , "Hui.Liu" , Zhiyong Tao , Andrew-CT Chen , Lala Lin , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Daniel Golle Subject: [PATCH v1 4/7] arm64: dts: mt7986: add PWM Date: Fri, 21 Apr 2023 15:20:44 +0200 Message-Id: <20230421132047.42166-5-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230421132047.42166-1-linux@fw-web.de> References: <20230421132047.42166-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: bde81c03-93b2-4a40-8fda-fbb03b5859d9 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763792948771758087?= X-GMAIL-MSGID: =?utf-8?q?1763792948771758087?= From: Daniel Golle This adds pwm node to mt7986. Signed-off-by: Daniel Golle Signed-off-by: Frank Wunderlich --- arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index a38965e23825..a409d5e845c2 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -240,6 +240,20 @@ crypto: crypto@10320000 { status = "disabled"; }; + pwm: pwm@10048000 { + compatible = "mediatek,mt7986-pwm"; + reg = <0 0x10048000 0 0x1000>; + #clock-cells = <1>; + #pwm-cells = <2>; + interrupts = ; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&infracfg CLK_INFRA_PWM_STA>, + <&infracfg CLK_INFRA_PWM1_CK>, + <&infracfg CLK_INFRA_PWM2_CK>; + clock-names = "top", "main", "pwm1", "pwm2"; + status = "disabled"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt7986-uart", "mediatek,mt6577-uart";