diff mbox series

[v1,4/7] arm64: dts: mt7986: add PWM

Message ID 20230421132047.42166-5-linux@fw-web.de
State New
Headers
Series [v1,1/7] dt-bindings: nvmem: mediatek: efuse: add support for mt7986 |

Commit Message

Frank Wunderlich April 21, 2023, 1:20 p.m. UTC 
  From: Daniel Golle <daniel@makrotopia.org>

This adds pwm node to mt7986.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
---
 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Matthias Brugger May 29, 2023, 3:58 p.m. UTC | #1 
On 21/04/2023 15:20, Frank Wunderlich wrote:
> From: Daniel Golle <daniel@makrotopia.org>
> 
> This adds pwm node to mt7986.
> 
> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index a38965e23825..a409d5e845c2 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -240,6 +240,20 @@ crypto: crypto@10320000 {
>   			status = "disabled";
>   		};
>   
> +		pwm: pwm@10048000 {
> +			compatible = "mediatek,mt7986-pwm";
> +			reg = <0 0x10048000 0 0x1000>;
> +			#clock-cells = <1>;
> +			#pwm-cells = <2>;
> +			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&topckgen CLK_TOP_PWM_SEL>,
> +				 <&infracfg CLK_INFRA_PWM_STA>,
> +				 <&infracfg CLK_INFRA_PWM1_CK>,
> +				 <&infracfg CLK_INFRA_PWM2_CK>;
> +			clock-names = "top", "main", "pwm1", "pwm2";
> +			status = "disabled";
> +		};
> +
>   		uart0: serial@11002000 {
>   			compatible = "mediatek,mt7986-uart",
>   				     "mediatek,mt6577-uart";
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index a38965e23825..a409d5e845c2 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -240,6 +240,20 @@  crypto: crypto@10320000 {
 			status = "disabled";
 		};
 
+		pwm: pwm@10048000 {
+			compatible = "mediatek,mt7986-pwm";
+			reg = <0 0x10048000 0 0x1000>;
+			#clock-cells = <1>;
+			#pwm-cells = <2>;
+			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&topckgen CLK_TOP_PWM_SEL>,
+				 <&infracfg CLK_INFRA_PWM_STA>,
+				 <&infracfg CLK_INFRA_PWM1_CK>,
+				 <&infracfg CLK_INFRA_PWM2_CK>;
+			clock-names = "top", "main", "pwm1", "pwm2";
+			status = "disabled";
+		};
+
 		uart0: serial@11002000 {
 			compatible = "mediatek,mt7986-uart",
 				     "mediatek,mt6577-uart";