[v3,1/2] usb: dwc3: core: add support for remapping global register start address
Commit Message
The RTK DHC SoCs were designed the global register address offset at
0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START
(0xc100). Therefore, add the property of device-tree to adjust this
address offset.
Signed-off-by: Stanley Chang <stanley_chang@realtek.com>
---
v2 to v3 change:
1. Fix the dtschema validation error.
v1 to v2 change:
1. Change the name of the property "snps,global-regs-starting-offset".
2. Adjust the format of comment.
3. Add initial value of the global_regs_starting_offset
4. Remove the log of dev_info.
---
drivers/usb/dwc3/core.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
@@ -1785,6 +1785,21 @@ static int dwc3_probe(struct platform_device *pdev)
dwc_res = *res;
dwc_res.start += DWC3_GLOBALS_REGS_START;
+ /*
+ * For some dwc3 controller, the dwc3 global register start address is
+ * not at DWC3_GLOBALS_REGS_START (0xc100).
+ */
+ if (dev->of_node) {
+ int global_regs_starting_offset = 0;
+
+ device_property_read_u32(dev, "snps,global-regs-starting-offset",
+ &global_regs_starting_offset);
+ if (global_regs_starting_offset) {
+ dwc_res.start -= DWC3_GLOBALS_REGS_START;
+ dwc_res.start += global_regs_starting_offset;
+ }
+ }
+
regs = devm_ioremap_resource(dev, &dwc_res);
if (IS_ERR(regs))
return PTR_ERR(regs);