From patchwork Tue Apr 18 10:42:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 84756 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2764038vqo; Tue, 18 Apr 2023 04:19:21 -0700 (PDT) X-Google-Smtp-Source: AKy350b/vLWwhu8hUsC0ZLm0bVP6+uZoA5xDQAzM9yvuuxkzA0WCMtRkcWj1PLvUYrmMUO8XlMtC X-Received: by 2002:a17:902:8e82:b0:1a6:9762:6eee with SMTP id bg2-20020a1709028e8200b001a697626eeemr1694625plb.40.1681816761267; Tue, 18 Apr 2023 04:19:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681816761; cv=none; d=google.com; s=arc-20160816; b=y53FooA8pGi3wWF+w8qOOuHuS8hPxBsiYNpmZgnKALBRJXckL2x/XK4PXB2sOnk91K 4BVZP0l60iakm2Q3C1QY7Wum8RY0/64eSFEjgTTv6V65ZgSZJhlrMTy6tzRwFXMxdq/k pZ12kAVGSWvAc1/t87uFmOYSU/iktRZR4usX52iavPbpNOAfpX8AlFvJHQ2MMkVt52O+ 4Iot3dJCZ3gDMnRQcKtiKxkOTDsHh7tBv8vwxsAuMXwfo2U1v7bWQSTXyUbdYyRSCzQf D+iQmLBw/gFMoQcaJcEfgHlK64+7tsWeOXbMBymtpOsruqf9BFw91c3wfd0iiY5/kQl2 MaKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=89SQ4dCUc98nmhPPWJjhXQVWmjeBe2DF1l7k75ocnH8=; b=NJ5XwfsXv/aGFqoHK4hFbiBFz6P8yE1+tY4toF7Uqa1y9ar5hr37FipTBJvAkCeisD 0gih4ZMKJC3eOnSmnzcs8hWNufByCJdf5MTzV8PstfyQaXbXeqMz2kuHQK4zMjNbwPPE yCSH3/4isIzA0V60U09gM5lIx8ArLp4DS7lKenwIOhVVf94fUnlngJusapK5mrr6gkXL Zx1uM9QrPdTRpy24Ed0apNw2SJsyFpq6MKfIJWvXE6dmw/x8Q2K5r4bfsZr7IeNPzMB1 t3FeEdzuxGeG/pqUGqnW+WP7O1EqmPdV3ZDLhan+iF7AADZX6TL9drnj+sSHSfA9olkb nxrw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@fris.de header.s=dkim header.b=reiB0NmT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=fris.de Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id k15-20020a170902c40f00b001a4fe074a08si14827199plk.188.2023.04.18.04.19.08; Tue, 18 Apr 2023 04:19:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@fris.de header.s=dkim header.b=reiB0NmT; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=fris.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231338AbjDRKmk (ORCPT + 99 others); Tue, 18 Apr 2023 06:42:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231341AbjDRKmh (ORCPT ); Tue, 18 Apr 2023 06:42:37 -0400 X-Greylist: delayed 681 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 18 Apr 2023 03:42:25 PDT Received: from mail.fris.de (mail.fris.de [116.203.77.234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87F797ABC for ; Tue, 18 Apr 2023 03:42:25 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4D97EC0180; Tue, 18 Apr 2023 12:42:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1681814542; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding; bh=89SQ4dCUc98nmhPPWJjhXQVWmjeBe2DF1l7k75ocnH8=; b=reiB0NmT69wwyzGC8K3Uwix9ZhnOdIbwKmuaalJD7H8U/vfKL4u0jIsNPBIKyIhy443ARX yKlgr3N5lKAAdHQ3BKh0MCBJLaUCsdaoh0mm/Rt85ipce3gxcWCBhjfymMAQYgOnAr+9en J3yOOBZqMOp82IUabFjs44NNpnxsdhYALQYKTviYHWNsrgsd5CaemX8x0jBS8Od/OChroN yIGm8ycyrC3n0wuR4s65n4ewutbtBSTKWUAqXQ7dzupIx02yA/HDevuPqVe7cofsgbU7Bm gencYmURUVXV1gkSXh/7fmffvGwwHoG8Uf2pZpvtmMd9Hpgy3EHqctqGshCifA== From: Frieder Schrempf To: Andrzej Hajda , Daniel Vetter , David Airlie , dri-devel@lists.freedesktop.org, Inki Dae , Jagan Teki , linux-kernel@vger.kernel.org, Marek Szyprowski , Neil Armstrong , Robert Foss Cc: Frieder Schrempf , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Marek Vasut Subject: [RFC PATCH 1/3] drm: bridge: samsung-dsim: Fix i.MX8M enable flow to meet spec Date: Tue, 18 Apr 2023 12:42:12 +0200 Message-Id: <20230418104215.877679-1-frieder@fris.de> MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763512692199019693?= X-GMAIL-MSGID: =?utf-8?q?1763512692199019693?= From: Frieder Schrempf According to the documentation [1] the proper enable flow is: 1. Enable DSI link and keep data lanes in LP-11 (stop state) 2. Disable stop state to bring data lanes into HS mode Currently we do this all at once within enable(), which doesn't allow to meet the requirements of some downstream bridges. To fix this we now enable the DSI in pre_enable() and force it into stop state using the FORCE_STOP_STATE bit in the ESCMODE register until enable() is called where we reset the bit. We currently do this only for i.MX8M as Exynos uses a different init flow where samsung_dsim_init() is called from samsung_dsim_host_transfer(). [1] https://docs.kernel.org/gpu/drm-kms-helpers.html#mipi-dsi-bridge-operation Signed-off-by: Frieder Schrempf --- drivers/gpu/drm/bridge/samsung-dsim.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index e0a402a85787..9775779721d9 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -859,6 +859,10 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi) reg = samsung_dsim_read(dsi, DSIM_ESCMODE_REG); reg &= ~DSIM_STOP_STATE_CNT_MASK; reg |= DSIM_STOP_STATE_CNT(driver_data->reg_values[STOP_STATE_CNT]); + + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + reg |= DSIM_FORCE_STOP_STATE; + samsung_dsim_write(dsi, DSIM_ESCMODE_REG, reg); reg = DSIM_BTA_TIMEOUT(0xff) | DSIM_LPDR_TIMEOUT(0xffff); @@ -1340,6 +1344,9 @@ static void samsung_dsim_atomic_pre_enable(struct drm_bridge *bridge, ret = samsung_dsim_init(dsi); if (ret) return; + + samsung_dsim_set_display_mode(dsi); + samsung_dsim_set_display_enable(dsi, true); } } @@ -1347,9 +1354,16 @@ static void samsung_dsim_atomic_enable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { struct samsung_dsim *dsi = bridge_to_dsi(bridge); + u32 reg; - samsung_dsim_set_display_mode(dsi); - samsung_dsim_set_display_enable(dsi, true); + if (samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) { + samsung_dsim_set_display_mode(dsi); + samsung_dsim_set_display_enable(dsi, true); + } else { + reg = samsung_dsim_read(dsi, DSIM_ESCMODE_REG); + reg &= ~DSIM_FORCE_STOP_STATE; + samsung_dsim_write(dsi, DSIM_ESCMODE_REG, reg); + } dsi->state |= DSIM_STATE_VIDOUT_AVAILABLE; } @@ -1358,10 +1372,17 @@ static void samsung_dsim_atomic_disable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { struct samsung_dsim *dsi = bridge_to_dsi(bridge); + u32 reg; if (!(dsi->state & DSIM_STATE_ENABLED)) return; + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) { + reg = samsung_dsim_read(dsi, DSIM_ESCMODE_REG); + reg |= DSIM_FORCE_STOP_STATE; + samsung_dsim_write(dsi, DSIM_ESCMODE_REG, reg); + } + dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE; }