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Peter Anvin" , linux-kernel@vger.kernel.org Subject: [RFC PATCH v2 09/11] KVM: VMX: Advertise MITI_CTRL_BHB_CLEAR_SEQ_S_SUPPORT Date: Fri, 14 Apr 2023 14:25:30 +0800 Message-Id: <20230414062545.270178-10-chao.gao@intel.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230414062545.270178-1-chao.gao@intel.com> References: <20230414062545.270178-1-chao.gao@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763133449630776830?= X-GMAIL-MSGID: =?utf-8?q?1763133449630776830?= From: Zhang Chen Allow guest to query if the underying VMM understands BHB-clearing sequence and report the statue of BHB-clearing sequence in suprevisor mode i.e. CPL < 3 via MSR_VIRTUAL_MITIGATION_ENUM/CTRL. Enable BHI_DIS_S for guest if guest is using BHI-clearing sequence and the sequence isn't effective on the processor. Signed-off-by: Zhang Chen Signed-off-by: Chao Gao Tested-by: Jiaan Lu --- arch/x86/kvm/vmx/vmx.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 25afb4c3e55e..abbbf8e66b53 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -1944,8 +1944,10 @@ static inline bool is_vmx_feature_control_msr_valid(struct vcpu_vmx *vmx, } #define VIRTUAL_ENUMERATION_VALID_BITS VIRT_ENUM_MITIGATION_CTRL_SUPPORT -#define MITI_ENUM_VALID_BITS MITI_ENUM_RETPOLINE_S_SUPPORT -#define MITI_CTRL_VALID_BITS MITI_CTRL_RETPOLINE_S_USED +#define MITI_ENUM_VALID_BITS (MITI_ENUM_RETPOLINE_S_SUPPORT | \ + MITI_ENUM_BHB_CLEAR_SEQ_S_SUPPORT) +#define MITI_CTRL_VALID_BITS (MITI_CTRL_RETPOLINE_S_USED | \ + MITI_CTRL_BHB_CLEAR_SEQ_S_USED) static int vmx_get_msr_feature(struct kvm_msr_entry *msr) { @@ -2496,6 +2498,11 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) arch_msr & ARCH_CAP_RRSBA) spec_ctrl_mask |= SPEC_CTRL_RRSBA_DIS_S; + if (data & MITI_CTRL_BHB_CLEAR_SEQ_S_USED && + kvm_cpu_cap_has(X86_FEATURE_BHI_CTRL) && + !(arch_msr & ARCH_CAP_BHI_NO)) + spec_ctrl_mask |= SPEC_CTRL_BHI_DIS_S; + /* * Intercept IA32_SPEC_CTRL to disallow guest from changing * certain bits.