diff mbox series

[2/8] MIPS: Set ISA level for MSA control reg helpers

Message ID 20230411111225.55725-3-jiaxun.yang@flygoat.com
State New
Headers
Series MIPS: LLVM build fixes |

Commit Message

Jiaxun Yang April 11, 2023, 11:12 a.m. UTC 
  MSA instructions requires at least Release 2 to be available.
Setting ISA level here to make GAS happy when building kernel
for earlier CPUs.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/include/asm/msa.h | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/mips/include/asm/msa.h b/arch/mips/include/asm/msa.h
index a9ca57e3f780..e13e538a7889 100644
--- a/arch/mips/include/asm/msa.h
+++ b/arch/mips/include/asm/msa.h
@@ -175,10 +175,12 @@  static inline void init_msa_upper(void)
 #define _ASM_UNSET_CTCMSA ".purgem ctcmsa\n\t"
 #else /* CONFIG_AS_HAS_MSA */
 #define _ASM_SET_CFCMSA						\
+		".set\t"MIPS_ISA_LEVEL"\n\t"			\
 		".set\tfp=64\n\t"				\
 		".set\tmsa\n\t"
 #define _ASM_UNSET_CFCMSA
 #define _ASM_SET_CTCMSA						\
+		".set\t"MIPS_ISA_LEVEL"\n\t"			\
 		".set\tfp=64\n\t"				\
 		".set\tmsa\n\t"
 #define _ASM_UNSET_CTCMSA