[11/17] iommu/vt-d: Fix operand size in bitwise operation

  From: Tina Zhang <tina.zhang@intel.com>

The patch fixes the klocwork issues that operands in a bitwise operation
have different size at line 1692 of dmar.c, line 1898 and line 1907 of
iommu.c.

Reported-by: Yongwei Ma <yongwei.ma@intel.com>
Signed-off-by: Tina Zhang <tina.zhang@intel.com>
Link: https://lore.kernel.org/r/20230406065944.2773296-2-tina.zhang@intel.com
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
---
 drivers/iommu/intel/dmar.c  | 2 +-
 drivers/iommu/intel/iommu.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)
  

From: Lu Baolu
> Sent: 11 April 2023 07:48
> 
> From: Tina Zhang <tina.zhang@intel.com>
> 
> The patch fixes the klocwork issues that operands in a bitwise operation
> have different size at line 1692 of dmar.c, line 1898 and line 1907 of
> iommu.c.

Why is this any kind of thing that needs fixing?

	David

> Reported-by: Yongwei Ma <yongwei.ma@intel.com>
> Signed-off-by: Tina Zhang <tina.zhang@intel.com>
> Link: https://lore.kernel.org/r/20230406065944.2773296-2-tina.zhang@intel.com
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> ---
>  drivers/iommu/intel/dmar.c  | 2 +-
>  drivers/iommu/intel/iommu.c | 4 ++--
>  2 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/iommu/intel/dmar.c b/drivers/iommu/intel/dmar.c
> index 23828d189c2a..f0f51c957ccb 100644
> --- a/drivers/iommu/intel/dmar.c
> +++ b/drivers/iommu/intel/dmar.c
> @@ -1690,7 +1690,7 @@ static void __dmar_enable_qi(struct intel_iommu *iommu)
>  	 * is present.
>  	 */
>  	if (ecap_smts(iommu->ecap))
> -		val |= (1 << 11) | 1;
> +		val |= BIT_ULL(11) | BIT_ULL(0);
> 
>  	raw_spin_lock_irqsave(&iommu->register_lock, flags);
> 
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index f4e536fd5a28..acbf82fa90e7 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -1870,7 +1870,7 @@ context_set_sm_rid2pasid(struct context_entry *context, unsigned long pasid)
>   */
>  static inline void context_set_sm_dte(struct context_entry *context)
>  {
> -	context->lo |= (1 << 2);
> +	context->lo |= BIT_ULL(2);
>  }
> 
>  /*
> @@ -1879,7 +1879,7 @@ static inline void context_set_sm_dte(struct context_entry *context)
>   */
>  static inline void context_set_sm_pre(struct context_entry *context)
>  {
> -	context->lo |= (1 << 4);
> +	context->lo |= BIT_ULL(4);
>  }
> 
>  /* Convert value to context PASID directory size field coding. */
> --
> 2.34.1

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
  

On 4/12/23 5:22 AM, David Laight wrote:
>> Sent: 11 April 2023 07:48
>>
>> From: Tina Zhang<tina.zhang@intel.com>
>>
>> The patch fixes the klocwork issues that operands in a bitwise operation
>> have different size at line 1692 of dmar.c, line 1898 and line 1907 of
>> iommu.c.
> Why is this any kind of thing that needs fixing?

This description is a bit misleading. Actually I queued it as a cleanup
patch.

Best regards,
baolu
  

From: Baolu Lu
> Sent: 12 April 2023 02:32
> 
> On 4/12/23 5:22 AM, David Laight wrote:
> >> Sent: 11 April 2023 07:48
> >>
> >> From: Tina Zhang<tina.zhang@intel.com>
> >>
> >> The patch fixes the klocwork issues that operands in a bitwise operation
> >> have different size at line 1692 of dmar.c, line 1898 and line 1907 of
> >> iommu.c.
> > Why is this any kind of thing that needs fixing?
> 
> This description is a bit misleading. Actually I queued it as a cleanup
> patch.

Hopefully without 'fix' anywhere in the description.
Otherwise the scripts will pick it for a back-port.

> > -		val |= (1 << 11) | 1;
> > +		val |= BIT_ULL(11) | BIT_ULL(0);

More problematic it what is bit 11 anyway?

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
  

Hi David,

> -----Original Message-----
> From: David Laight <David.Laight@ACULAB.COM>
> Sent: Wednesday, April 12, 2023 3:11 PM
> To: 'Baolu Lu' <baolu.lu@linux.intel.com>; Joerg Roedel <joro@8bytes.org>
> Cc: Vinod Koul <vkoul@kernel.org>; Zhang, Tina <tina.zhang@intel.com>; Jacob
> Pan <jacob.jun.pan@linux.intel.com>; Christophe JAILLET
> <christophe.jaillet@wanadoo.fr>; iommu@lists.linux.dev; linux-
> kernel@vger.kernel.org
> Subject: RE: [PATCH 11/17] iommu/vt-d: Fix operand size in bitwise operation
> 
> From: Baolu Lu
> > Sent: 12 April 2023 02:32
> >
> > On 4/12/23 5:22 AM, David Laight wrote:
> > >> Sent: 11 April 2023 07:48
> > >>
> > >> From: Tina Zhang<tina.zhang@intel.com>
> > >>
> > >> The patch fixes the klocwork issues that operands in a bitwise
> > >> operation have different size at line 1692 of dmar.c, line 1898 and
> > >> line 1907 of iommu.c.
> > > Why is this any kind of thing that needs fixing?
> >
> > This description is a bit misleading. Actually I queued it as a
> > cleanup patch.
> 
> Hopefully without 'fix' anywhere in the description.
> Otherwise the scripts will pick it for a back-port.
Sure.

> 
> > > -		val |= (1 << 11) | 1;
> > > +		val |= BIT_ULL(11) | BIT_ULL(0);
> 
> More problematic it what is bit 11 anyway?
The magic number should be removed from here.

Regards,
-Tina
> 
> 	David
> 
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1
> 1PT, UK Registration No: 1397386 (Wales)
  

On 2023/4/12 15:11, David Laight wrote:
> From: Baolu Lu
>> Sent: 12 April 2023 02:32
>>
>> On 4/12/23 5:22 AM, David Laight wrote:
>>>> Sent: 11 April 2023 07:48
>>>>
>>>> From: Tina Zhang<tina.zhang@intel.com>
>>>>
>>>> The patch fixes the klocwork issues that operands in a bitwise operation
>>>> have different size at line 1692 of dmar.c, line 1898 and line 1907 of
>>>> iommu.c.
>>> Why is this any kind of thing that needs fixing?
>>
>> This description is a bit misleading. Actually I queued it as a cleanup
>> patch.
> 
> Hopefully without 'fix' anywhere in the description.
> Otherwise the scripts will pick it for a back-port.

Fair enough.I will refine the commit message like below:

iommu/vt-d: Make size of operands same in bitwise operations

The addresses the following issue reported by klocwork tool:

  - operands of different size in bitwise operations

Suggested-by: Yongwei Ma <yongwei.ma@intel.com>
Signed-off-by: Tina Zhang <tina.zhang@intel.com>

> 
>>> -		val |= (1 << 11) | 1;
>>> +		val |= BIT_ULL(11) | BIT_ULL(0);
> 
> More problematic it what is bit 11 anyway?

There is already a comment at the top of the code explaining the meaning
of these bits. Because this is not a newly added code, it is not
displayed in this patch.

         /*
          * Set DW=1 and QS=1 in IQA_REG when Scalable Mode capability
          * is present.
          */
         if (ecap_smts(iommu->ecap))
                 val |= BIT_ULL(11) | BIT_ULL(0);

Best regards,
baolu
  

From: Baolu Lu
> Sent: 12 April 2023 14:11
...
> The addresses the following issue reported by klocwork tool:
> 
>   - operands of different size in bitwise operations

Then fix the stupid tool to not be that pedantic.

	David

-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
  

On 2023/4/12 21:27, David Laight wrote:
> From: Baolu Lu
>> Sent: 12 April 2023 14:11
> ...
>> The addresses the following issue reported by klocwork tool:
>>
>>    - operands of different size in bitwise operations
> Then fix the stupid tool to not be that pedantic.

Good idea. But before the users/customers stop complaining, let's have a
cleanup like this. :-)

Best regards,
baolu