From patchwork Mon Apr 17 20:21:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 84435 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2381691vqo; Mon, 17 Apr 2023 13:22:47 -0700 (PDT) X-Google-Smtp-Source: AKy350an5Ycj7c/Co7vq17EEsTlplwncCcIYAaDXFV7qn+bLuUudJbqPRu+OyLC29kz+BGBioNu1 X-Received: by 2002:a17:902:bc46:b0:1a6:67e1:4d2c with SMTP id t6-20020a170902bc4600b001a667e14d2cmr197226plz.6.1681762966908; Mon, 17 Apr 2023 13:22:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1681762966; cv=none; d=google.com; s=arc-20160816; b=05/Zf/zT90Pwg9dfMyr7aYrRHolyrsEZK/90r96Qs527DI59TmRi0koMgZ1D+USpqz turT4Pu/ikXU2jF1/umatZckLSoOelbHEkfSuGxEgwSuX/CyoBpJwmt5emPwKwcMb7gK 9Ncf+81k1fHZZsMmwOP9IjYYLD3XUS4Ry1emNgqJV9K3tx8BlnN+BZHDyAy7j/QdEFy2 jurHjrS0lPugtk+HQDblR75wKNJk+kWxUhO4jbJRP08LKfH5e2WjPeoxQO72XA925jSm JRUQ1F4EcLcQWWakVlbbZizUJbShVgwlPJKZ3qsIrNAYNguJzaxi3HBCXxnlq0F7bnIa ETUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from; bh=AqZwwM99aKliWAFLwDuJwKoe+6vJTz2oFT3S+IrLayU=; b=ubxSo5Jyk+ZU1kvMJBwtfFgCQ1mrGOv8jw4naXCe68t3q5MWMh+ONmNQ8KLyoUEwXr WxAyhdgATG5jd4C+YcgQKtYleyXqBQ/8aRa0QoVeFyl/i1TH68yJCtedNFNJus5hag2i sgMEJRi4TaH2JAZcHqk6sTn+IW0AspjkBHI6WpPIuctwuCv5oVfg7TZ0naCOTyvOJckp lueYW+7JYXPbsNThSNt+KpCrnrxiRlV+Q8C3P1ox5OzkjBU+g8CwF8NsKGWtRuUU0cHS Ori8HjhBYd54C81lX8GPB13lhzIwxdo/teXDz7hqtDomRtWD20kqAu1cIixAc9B4EcDW X3Og== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c10-20020a170902848a00b001a1ddcfeba2si12237123plo.492.2023.04.17.13.22.34; Mon, 17 Apr 2023 13:22:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229957AbjDQUV4 (ORCPT + 99 others); Mon, 17 Apr 2023 16:21:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230078AbjDQUVs (ORCPT ); Mon, 17 Apr 2023 16:21:48 -0400 Received: from relay06.th.seeweb.it (relay06.th.seeweb.it [IPv6:2001:4b7a:2000:18::167]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B94B10CE for ; Mon, 17 Apr 2023 13:21:47 -0700 (PDT) Received: from Marijn-Arch-PC.localdomain (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id DB1F23F885; Mon, 17 Apr 2023 22:21:44 +0200 (CEST) From: Marijn Suijten Date: Mon, 17 Apr 2023 22:21:42 +0200 Subject: [PATCH v2 03/17] drm/msm/dpu: Move non-MDP_TOP INTF_INTR offsets out of hwio header MIME-Version: 1.0 Message-Id: <20230411-dpu-intf-te-v2-3-ef76c877eb97@somainline.org> References: <20230411-dpu-intf-te-v2-0-ef76c877eb97@somainline.org> In-Reply-To: <20230411-dpu-intf-te-v2-0-ef76c877eb97@somainline.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Adam Skladowski , Loic Poulain , Bjorn Andersson , Kuogee Hsieh , Robert Foss , Vinod Koul , Rajesh Yadav , Jeykumar Sankaran , Neil Armstrong , Chandan Uddaraju Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jordan Crouse , Archit Taneja , Sravanthi Kollukuduru , Marijn Suijten X-Mailer: b4 0.12.2 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1763456284559416045?= X-GMAIL-MSGID: =?utf-8?q?1763456284559416045?= These offsets do not fall under the MDP TOP block and do not fit the comment right above. Move them to dpu_hw_interrupts.c next to the repsective MDP_INTF_x_OFF interrupt block offsets. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Marijn Suijten Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 5 ++++- drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h | 3 --- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c index 53326f25e40e..85c0bda3ff90 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c @@ -15,7 +15,7 @@ /* * Register offsets in MDSS register file for the interrupt registers - * w.r.t. to the MDP base + * w.r.t. the MDP base */ #define MDP_SSPP_TOP0_OFF 0x0 #define MDP_INTF_0_OFF 0x6A000 @@ -24,6 +24,9 @@ #define MDP_INTF_3_OFF 0x6B800 #define MDP_INTF_4_OFF 0x6C000 #define MDP_INTF_5_OFF 0x6C800 +#define INTF_INTR_EN 0x1c0 +#define INTF_INTR_STATUS 0x1c4 +#define INTF_INTR_CLEAR 0x1c8 #define MDP_AD4_0_OFF 0x7C000 #define MDP_AD4_1_OFF 0x7D000 #define MDP_AD4_INTR_EN_OFF 0x41c diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h index feb9a729844a..5acd5683d25a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hwio.h @@ -21,9 +21,6 @@ #define HIST_INTR_EN 0x01c #define HIST_INTR_STATUS 0x020 #define HIST_INTR_CLEAR 0x024 -#define INTF_INTR_EN 0x1C0 -#define INTF_INTR_STATUS 0x1C4 -#define INTF_INTR_CLEAR 0x1C8 #define SPLIT_DISPLAY_EN 0x2F4 #define SPLIT_DISPLAY_UPPER_PIPE_CTRL 0x2F8 #define DSPP_IGC_COLOR0_RAM_LUTN 0x300