Message ID | 20230410203357.17704-1-yazen.ghannam@amd.com |
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State | New |
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Mon, 10 Apr 2023 15:34:09 -0500 From: Yazen Ghannam <yazen.ghannam@amd.com> To: <bp@alien8.de>, <linux-edac@vger.kernel.org> CC: <linux-kernel@vger.kernel.org>, <avadhut.naik@amd.com>, Yazen Ghannam <yazen.ghannam@amd.com> Subject: [PATCH] EDAC/mce_amd: Decode Cache Level "L0" Error Code Date: Mon, 10 Apr 2023 15:33:57 -0500 Message-ID: <20230410203357.17704-1-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0000EE3E:EE_|SN7PR12MB7954:EE_ X-MS-Office365-Filtering-Correlation-Id: f240aca0-ce3b-471c-71d1-08db3a02f0c4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bNvR0oVtU+Hs5hJ0EgZmvDMLdM87eXFcn78ur3M6/d3IWD3gkEQEZQwxpnDV1K0/XZgPECb//MyZ5ZWM+sir8gIW+CG8DgzRagpQ1HWkq3hIRUXHZHru39CFV1ZzLX9wVJis9NTSZcxxAgYdhPFf/cNsatSsz4qLbPaTTR3egSaeQ7JZqVHWtw35xomHaHZxcMiiy4Ekww2yJ5IDIfp09S+xz4QdQMUM49L9n/25qDiUBgrFPU6xmHPHhDGnz91SaqnxgvXOX0jeBXT3BjFxeTGRQCc/Sg686wKzFxGqToMVANxiPRhvytaXeZoPEN8qv+4mS+aQkA7yBPDZk8eEY55wyKxSNaT8MPxyWPYO260OVi7+LLSSCbBQSCOfbtJSJcwPWQuEAQowyPiSfjnUjRZPWZoM8htT9jy6L/vEN1Vb+/LsLAzhn/DXfFWDereyoF+Y0ypH6YAawpUsPSDJO12Dk5kUV2EB6Emfmb2RZy0YDAd/z3lU0O3VrzufaiSwlU3bGjAodqsNfzBD9Tym3U0cn9KUe/vI6eGcy9I8eBjLcreFGasN4MMGxO4WaVFUUEV9U5Qt5wfes4odYzVlvxGiKt7ycFiBLClfcZmfR/wT7Q/0yII4A0Xlo0/Ukf27bNH2RLVvLn9L3lhDeQ0XXF9VJHT8saGqdhkJNzSxtOzsPWZXd15/EF4b5djz7vrXah3xd+WgpByIPHS5CzhghhKKEGv3mHtO5pmUN11vDyo= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(376002)(39860400002)(396003)(136003)(451199021)(36840700001)(40470700004)(46966006)(86362001)(36756003)(41300700001)(110136005)(316002)(478600001)(70206006)(70586007)(8676002)(4326008)(7696005)(54906003)(40480700001)(82310400005)(5660300002)(44832011)(2906002)(8936002)(4744005)(47076005)(81166007)(82740400003)(356005)(36860700001)(16526019)(186003)(6666004)(1076003)(26005)(2616005)(336012)(426003)(83380400001)(40460700003)(36900700001);DIR:OUT;SFP:1101; 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EDAC/mce_amd: Decode Cache Level "L0" Error Code
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Commit Message
Yazen Ghannam
April 10, 2023, 8:33 p.m. UTC
The "L0" cache level is listed as "reserved" in legacy documentation.
This has now been defined as "Core" in current documentation for
Zen-based systems.
Update the cache level strings to include this new definition.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
drivers/edac/mce_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Mon, Apr 10, 2023 at 03:33:57PM -0500, Yazen Ghannam wrote: > The "L0" cache level is listed as "reserved" in legacy documentation. > This has now been defined as "Core" in current documentation for > Zen-based systems. > > Update the cache level strings to include this new definition. > > Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> > --- > drivers/edac/mce_amd.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c > index cc5c63feb26a..1d1b9da3b9bd 100644 > --- a/drivers/edac/mce_amd.c > +++ b/drivers/edac/mce_amd.c > @@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder); > static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" }; > > /* cache level */ > -static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" }; > +static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" }; Still used on legacy machines. I thought we agreed we'll move all the decoding to luserspace, for newer Zens...
On 4/10/23 16:47, Borislav Petkov wrote: > On Mon, Apr 10, 2023 at 03:33:57PM -0500, Yazen Ghannam wrote: >> The "L0" cache level is listed as "reserved" in legacy documentation. >> This has now been defined as "Core" in current documentation for >> Zen-based systems. >> >> Update the cache level strings to include this new definition. >> >> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> >> --- >> drivers/edac/mce_amd.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c >> index cc5c63feb26a..1d1b9da3b9bd 100644 >> --- a/drivers/edac/mce_amd.c >> +++ b/drivers/edac/mce_amd.c >> @@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder); >> static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" }; >> >> /* cache level */ >> -static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" }; >> +static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" }; > > Still used on legacy machines. I thought we agreed we'll move all the > decoding to luserspace, for newer Zens... > I was thinking about that for the Extended Error Code descriptions. But good point, please disregard this patch. Thanks, Yazen
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index cc5c63feb26a..1d1b9da3b9bd 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -37,7 +37,7 @@ EXPORT_SYMBOL_GPL(amd_unregister_ecc_decoder); static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" }; /* cache level */ -static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" }; +static const char * const ll_msgs[] = { "CORE", "L1", "L2", "L3/GEN" }; /* memory transaction type */ static const char * const rrrr_msgs[] = {