[net,v2,1/7] octeontx2-af: Secure APR table update with the lock

Message ID 20230407122344.4059-2-saikrishnag@marvell.com
State New
Headers
Series octeontx2: Miscellaneous fixes |

Commit Message

Sai Krishna Gajula April 7, 2023, 12:23 p.m. UTC
  From: Geetha sowjanya <gakula@marvell.com>

APR table contains the lmtst base address of PF/VFs.
These entries are updated by the PF/VF during the
device probe. Due to race condition while updating the
entries are getting corrupted. Hence secure the APR
table update with the lock.

Fixes: 893ae97214c3 ("octeontx2-af: cn10k: Support configurable LMTST regions")
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: Sai Krishna <saikrishnag@marvell.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
  

Comments

Simon Horman April 8, 2023, 2:33 p.m. UTC | #1
On Fri, Apr 07, 2023 at 05:53:38PM +0530, Sai Krishna wrote:
> From: Geetha sowjanya <gakula@marvell.com>
> 
> APR table contains the lmtst base address of PF/VFs.
> These entries are updated by the PF/VF during the
> device probe. Due to race condition while updating the
> entries are getting corrupted. Hence secure the APR
> table update with the lock.

Hi Sai, Geetha,

I think it would be useful to describe what races with
rvu_mbox_handler_lmtst_tbl_setup().

...
  
Sai Krishna Gajula April 10, 2023, 8:25 a.m. UTC | #2
Please see inline,

> -----Original Message-----
> From: Simon Horman <simon.horman@corigine.com>
> Sent: Saturday, April 8, 2023 8:03 PM
> To: Sai Krishna Gajula <saikrishnag@marvell.com>
> Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; netdev@vger.kernel.org; linux-
> kernel@vger.kernel.org; Sunil Kovvuri Goutham <sgoutham@marvell.com>;
> Geethasowjanya Akula <gakula@marvell.com>; richardcochran@gmail.com;
> Linu Cherian <lcherian@marvell.com>; Jerin Jacob Kollanukkaran
> <jerinj@marvell.com>; Hariprasad Kelam <hkelam@marvell.com>;
> Subbaraya Sundeep Bhatta <sbhatta@marvell.com>
> Subject: Re: [net PATCH v2 1/7] octeontx2-af: Secure APR table update
> with the lock
> 
> On Fri, Apr 07, 2023 at 05:53:38PM +0530, Sai Krishna wrote:
> > From: Geetha sowjanya <gakula@marvell.com>
> >
> > APR table contains the lmtst base address of PF/VFs.
> > These entries are updated by the PF/VF during the device probe. Due to
> > race condition while updating the entries are getting corrupted. Hence
> > secure the APR table update with the lock.
> 
> Hi Sai, Geetha,
> 
> I think it would be useful to describe what races with
> rvu_mbox_handler_lmtst_tbl_setup().

We will rewrite comment message and submit  v3 patch.

Thanks,
Sai
> 
> ...
  

Patch

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
index 4ad9ff025c96..8530250f6fba 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
@@ -142,16 +142,17 @@  int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,
 	 * region, if so, convert that IOVA to physical address and
 	 * populate LMT table with that address
 	 */
+	mutex_lock(&rvu->rsrc_lock);
 	if (req->use_local_lmt_region) {
 		err = rvu_get_lmtaddr(rvu, req->hdr.pcifunc,
 				      req->lmt_iova, &lmt_addr);
 		if (err < 0)
-			return err;
+			goto error;
 
 		/* Update the lmt addr for this PFFUNC in the LMT table */
 		err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, lmt_addr);
 		if (err)
-			return err;
+			goto error;
 	}
 
 	/* Reconfiguring lmtst map table in lmt region shared mode i.e. make
@@ -181,7 +182,7 @@  int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,
 		 */
 		err = rvu_update_lmtaddr(rvu, req->hdr.pcifunc, val);
 		if (err)
-			return err;
+			goto error;
 	}
 
 	/* This mailbox can also be used to update word1 of APR_LMT_MAP_ENTRY_S
@@ -230,6 +231,7 @@  int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,
 	}
 
 error:
+	mutex_unlock(&rvu->rsrc_lock);
 	return err;
 }