Message ID | 20230407105029.2274111-3-abel.vesa@linaro.org |
---|---|
State | New |
Headers |
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J . Bottomley" <jejb@linux.ibm.com>, "Martin K . Petersen" <martin.petersen@oracle.com>, Herbert Xu <herbert@gondor.apana.org.au>, "David S . Miller" <davem@davemloft.net>, Eric Biggers <ebiggers@kernel.org> Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-scsi@vger.kernel.org Subject: [PATCH v6 2/6] dt-bindings: ufs: qcom: Add ICE phandle Date: Fri, 7 Apr 2023 13:50:25 +0300 Message-Id: <20230407105029.2274111-3-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230407105029.2274111-1-abel.vesa@linaro.org> References: <20230407105029.2274111-1-abel.vesa@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762514490373332975?= X-GMAIL-MSGID: =?utf-8?q?1762514490373332975?= |
Series |
Add dedicated Qcom ICE driver
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Commit Message
Abel Vesa
April 7, 2023, 10:50 a.m. UTC
Starting with SM8550, the ICE will have its own devicetree node
so add the qcom,ice property to reference it.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
The v5 is here:
https://lore.kernel.org/all/20230403200530.2103099-3-abel.vesa@linaro.org/
Changes since v5:
* dropped the sm8550 specific subschema and replaced it with one that
mutually excludes the qcom,ice vs both the ICE specific reg range
and the ICE clock
Changes since v4:
* Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce
it while making sure none of the other platforms are allowed to use it
Changes since v3:
* dropped the "and drop core clock" part from subject line
Changes since v2:
* dropped all changes except the qcom,ice property
.../devicetree/bindings/ufs/qcom,ufs.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
Comments
On 07/04/2023 12:50, Abel Vesa wrote: > Starting with SM8550, the ICE will have its own devicetree node > so add the qcom,ice property to reference it. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > > The v5 is here: > https://lore.kernel.org/all/20230403200530.2103099-3-abel.vesa@linaro.org/ > > Changes since v5: > * dropped the sm8550 specific subschema and replaced it with one that > mutually excludes the qcom,ice vs both the ICE specific reg range > and the ICE clock > > Changes since v4: > * Added check for sm8550 compatible w.r.t. qcom,ice in order to enforce > it while making sure none of the other platforms are allowed to use it > > Changes since v3: > * dropped the "and drop core clock" part from subject line > > Changes since v2: > * dropped all changes except the qcom,ice property > > > .../devicetree/bindings/ufs/qcom,ufs.yaml | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > index c5a06c048389..71aa79eac6b4 100644 > --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml > @@ -70,6 +70,10 @@ properties: > power-domains: > maxItems: 1 > > + qcom,ice: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: phandle to the Inline Crypto Engine node > + > reg: > minItems: 1 > maxItems: 2 > @@ -187,6 +191,28 @@ allOf: > > # TODO: define clock bindings for qcom,msm8994-ufshc > > + - if: > + properties: > + qcom,ice: > + minItems: 1 Drop minItems > + maxItems: 1 > + then: > + properties: > + reg: > + minItems: 1 Drop minItems > + maxItems: 1 > + clocks: > + minItems: 8 > + maxItems: 8 Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index c5a06c048389..71aa79eac6b4 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -70,6 +70,10 @@ properties: power-domains: maxItems: 1 + qcom,ice: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the Inline Crypto Engine node + reg: minItems: 1 maxItems: 2 @@ -187,6 +191,28 @@ allOf: # TODO: define clock bindings for qcom,msm8994-ufshc + - if: + properties: + qcom,ice: + minItems: 1 + maxItems: 1 + then: + properties: + reg: + minItems: 1 + maxItems: 1 + clocks: + minItems: 8 + maxItems: 8 + else: + properties: + reg: + minItems: 2 + maxItems: 2 + clocks: + minItems: 9 + maxItems: 11 + unevaluatedProperties: false examples: