From patchwork Thu Apr 6 17:18:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 80372 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1193120vqo; Thu, 6 Apr 2023 10:35:05 -0700 (PDT) X-Google-Smtp-Source: AKy350awe6kpC2e687gLskDvdwvtjvfnbFn+swSceGdS3idbeAdY8S9rPqmOJDpy3r9j7EUKux9B X-Received: by 2002:a17:902:d2cc:b0:1a2:37fc:b591 with SMTP id n12-20020a170902d2cc00b001a237fcb591mr12786369plc.69.1680802504758; Thu, 06 Apr 2023 10:35:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680802504; cv=none; d=google.com; s=arc-20160816; b=T/C93mQ/VPKglPX83RU9a+CCS0hYdPMu25uwz7Q3bSnvT42IrarVIcap0zN7mmWLuT vfD8VlwlsdEbUDdViaCetB/btGrdnzQdH9YuAlABIZRvUlWGuNSZN6tqKIy9QI5+52VP 7FoQOKVH9RgySP4HHVssXPwg0o6qs7I6FOiXSoHfUFlPlMFc4fksNoxI6Ya1kSxZX+xs vID1ll5F2n7XdRZl2ZJzuMJMxPYHLpkq06Qu9sjGY4FZoOOOfiN/GDD6RbzO/ivtKq1u a1hpB2rnU7emQF6iXA1pcXzj2BgaCVBwPnSs2ernEjBcu249H50LiwZwzxFRM5zYerIx Cbfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+HY613/cWpilX/UQhldIyeAAp/lXCX0yrKtKN9LFBRw=; b=n1zFNrtwNtp/75+yNGMQZBX1dXIAZMN3cMi7PISb7bKDH8R2vLI/cD5vUzZdVNGlwB Lw6mf2a/KrSWVIHoKtt7hYeQrr3B1fJeSeyrLOq6pa5MGzXaN0xrxXoa2wMB6jCY+Qtw HiZ5A5iqQd9h9i9dddnYbDh2Ibf0OgtxqQ5fkW7eQGIj7/+yQwA9jLs/tCslBmhOU5/R qmHBdUWkm9NLS/KLUEsFyb5UupReO8vl3EMs5JeYpkMe17Rff0CmRrhYtj9BETWB8M3n iBSVz7d9ogm8hw0xzxu5AlF9U6o2CniqQaCKWWMPGWIPLp652Rv2ZmhwUoQ9ZmAupuWb 20jQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Ci7RrtHc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v63-20020a638942000000b00513ac9473casi1754298pgd.893.2023.04.06.10.34.51; Thu, 06 Apr 2023 10:35:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Ci7RrtHc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239468AbjDFRSn (ORCPT + 99 others); Thu, 6 Apr 2023 13:18:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239799AbjDFRSd (ORCPT ); Thu, 6 Apr 2023 13:18:33 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9757FA5F8; Thu, 6 Apr 2023 10:18:27 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 29CF666031D8; Thu, 6 Apr 2023 18:18:26 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680801506; bh=qXAW+NxBtXP2ZLN97K9FdNC+pkjm39ZBXXRQWxqaxDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ci7RrtHc9ZBNPOLRstPWC2OfXurE6hOiXoO0xHokWOqtETMDVeKr5a2cgZfpU9qZu C8TCUnss3cRqVa/nrK+V1sgtwpglXXJezjiafg4mO/MvhtRUwliCQR9HAwQYcKDq10 yt3yWVja6aB/A5t+/bBxpU6Wiuf9+XeqFoOWB57YP8uMw4KSh3RhW0YXjK0025xFdQ 5eam5pCDuPDqVoWPzf7Lr9Jv2LOJL+v8dg5hWsGEOCyDWha7cqVk7YVwj7n4HZ6idl XCp9FHDM6cWwtr4hl+UXUXB62/uckrMQV/Axi/FcvnAYlYzLFoFl4nWFoc4Qt3WTZS 8RtYV5NrCxm3w== From: Cristian Ciocaltea To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Bjorn Andersson , Joseph Chen , Ezequiel Garcia Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 5/8] regulator: fan53555: Make use of the bit macros Date: Thu, 6 Apr 2023 20:18:03 +0300 Message-Id: <20230406171806.948290-6-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230406171806.948290-1-cristian.ciocaltea@collabora.com> References: <20230406171806.948290-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762449167279704238?= X-GMAIL-MSGID: =?utf-8?q?1762449167279704238?= For consistency and improved clarity, use BIT() and GENMASK() macros for defining the bitfields inside the registers. No functional changes intended. While here, also fix DIE_{ID,REV} inconsistent indentation. Signed-off-by: Cristian Ciocaltea --- drivers/regulator/fan53555.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c index 68ebcd4ccef7..181e5eb00e7a 100644 --- a/drivers/regulator/fan53555.c +++ b/drivers/regulator/fan53555.c @@ -41,23 +41,23 @@ #define FAN53555_MONITOR 0x05 /* VSEL bit definitions */ -#define VSEL_BUCK_EN (1 << 7) -#define VSEL_MODE (1 << 6) +#define VSEL_BUCK_EN BIT(7) +#define VSEL_MODE BIT(6) /* Chip ID and Verison */ -#define DIE_ID 0x0F /* ID1 */ -#define DIE_REV 0x0F /* ID2 */ +#define DIE_ID 0x0F /* ID1 */ +#define DIE_REV 0x0F /* ID2 */ /* Control bit definitions */ -#define CTL_OUTPUT_DISCHG (1 << 7) -#define CTL_SLEW_MASK (0x7 << 4) -#define CTL_RESET (1 << 2) +#define CTL_OUTPUT_DISCHG BIT(7) +#define CTL_SLEW_MASK GENMASK(6, 4) +#define CTL_RESET BIT(2) #define CTL_MODE_VSEL0_MODE BIT(0) #define CTL_MODE_VSEL1_MODE BIT(1) #define FAN53555_NVOLTAGES 64 /* Numbers of voltages */ #define FAN53526_NVOLTAGES 128 -#define TCS_VSEL0_MODE (1 << 7) -#define TCS_VSEL1_MODE (1 << 6) +#define TCS_VSEL0_MODE BIT(7) +#define TCS_VSEL1_MODE BIT(6) #define TCS_SLEW_MASK GENMASK(4, 3)