Message ID | 20230406070032.22243-5-quic_devipriy@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp832469vqo; Thu, 6 Apr 2023 00:16:38 -0700 (PDT) X-Google-Smtp-Source: AKy350YvFmxprUHO1PCFECpFQwg/PYCMlcSoBHVx4VD/TOyL+52ldSBh9Tvw2arw/axUuosEBAxA X-Received: by 2002:a17:907:da7:b0:933:422b:5f5d with SMTP id go39-20020a1709070da700b00933422b5f5dmr7396673ejc.18.1680765397902; Thu, 06 Apr 2023 00:16:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680765397; cv=none; d=google.com; s=arc-20160816; b=rYm1/A2XYpyuLdk6yTQFs4r3Hw6OcE6dZo2dXTYb+ckNPotNBx74+WEt3KY0xrTo3z 0NIYOf0VuOQmhOsZu/GST57GW8ZhAUU6Z9aWhY9yCew8h/Dde4zQLaKvO+VO6lqCi8Bc fvNxP6TC/uVNDzqF+qezoWYbPukI9jj6Qi7vBUADnGjVlAjRsPp20xl1E+Qx9HhKJjSO 0bkinZCKKDjX85EDQ1u3sLLwDU2FrBxZVQBf6PQZMoRIycbtzxKfpcKcvJPPUg8pkUU+ ofomBgDdm7DtvKc2Lw90J58QhaURIl0Xc+Q1GQApsqJ6MvBw7rcGHrCR/0SqGxVqge3t OVIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=t1I9rMZoWjCxLic+tlwDsH+JR1T/SjScAlj7YtP+Pqo=; b=w3KYL2qd18ZI4WMJ2jRnZaw6zwtqLA3vQHtOtLIMiOLP3AcUby39/0Go+4QES8/34l w+IpMJx+YtwFlbEqH2zKRCzPqZxc4MU2VIWpgnPs8pzHG6oWDxuOe92u2JXDoKAlx15R +ftsfRxoABnU9hBLcg65LtV0+Hzd0wqK5curvs4i2uNsuVGkfEKEwdQh1Pb5mgG8uiPO V9aU+lhsHKUu4XUBQRBznEF+1M7YyFhHSaidzhU30PgZlLTqW5ycy2v/0+suwzspILWP Fg+qaUgFNuPBSYT7z2SUjJMnamA+DkhDHJJ1yRQ3mg9OOX9V9oI0UxmjNB0Pnzi6zL7p e6kQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ojIR187K; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f18-20020a50ee92000000b004ad15de0646si600813edr.591.2023.04.06.00.16.14; Thu, 06 Apr 2023 00:16:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=ojIR187K; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235799AbjDFHCq (ORCPT <rfc822;lkml4gm@gmail.com> + 99 others); Thu, 6 Apr 2023 03:02:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234713AbjDFHCC (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 6 Apr 2023 03:02:02 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1463A278; Thu, 6 Apr 2023 00:01:18 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3364kbKo021173; Thu, 6 Apr 2023 07:01:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=t1I9rMZoWjCxLic+tlwDsH+JR1T/SjScAlj7YtP+Pqo=; b=ojIR187Kp8GNzse5jDjU1CBw4uEB4GXBi8bX1bi9Wm+R2kSK02XXthQ5xg13NrXBk9vs sBW06EhKrQI2hjWemx+RDQkR94mk2mSDPYU8xclqHHv0pm3k3gvD1xxGCw9acl9D7+qs EDLKhOwUCqB2y6yD/bwrstec4Dgd3deXkE7N7VAQJ1S3EutYKd8Uie+Kft3QCY0GQ/Tj 3XKA/O1dvtV8w+zTqjDGC2K4/Jm572htstUdgi5VymIxQlWxA86DQ+uTI/o8GrwjBQJJ OYo8+neKRNA3Et91byfYpc0+ylZxSJaTl1DQ8c94tAQzgI9dmbGYgYzRdTKSjxrPf2gO gg== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3psmyx0hh3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 06 Apr 2023 07:01:15 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33671ErW015016 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 6 Apr 2023 07:01:14 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Thu, 6 Apr 2023 00:01:09 -0700 From: Devi Priya <quic_devipriy@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <lgirdwood@gmail.com>, <broonie@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org> CC: <quic_srichara@quicinc.com>, <quic_sjaganat@quicinc.com>, <quic_kathirav@quicinc.com>, <quic_arajkuma@quicinc.com>, <quic_anusha@quicinc.com>, <quic_ipkumar@quicinc.com> Subject: [PATCH V3 4/5] arm64: dts: qcom: ipq9574: Add SMPA1 regulator node Date: Thu, 6 Apr 2023 12:30:31 +0530 Message-ID: <20230406070032.22243-5-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230406070032.22243-1-quic_devipriy@quicinc.com> References: <20230406070032.22243-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: PdppawS-NKD1vBU4qvaPPHxwx66zAaAZ X-Proofpoint-ORIG-GUID: PdppawS-NKD1vBU4qvaPPHxwx66zAaAZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-06_02,2023-04-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 adultscore=0 clxscore=1015 mlxlogscore=944 bulkscore=0 mlxscore=0 lowpriorityscore=0 spamscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304060061 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762410257737794669?= X-GMAIL-MSGID: =?utf-8?q?1762410257737794669?= |
Series |
Add regulator support for IPQ9574 SoC
|
|
Commit Message
Devi Priya
April 6, 2023, 7 a.m. UTC
Add support for SMPA1 regulator node in IPQ9574. Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> --- Changes in V3: - Updated the regulator-min-microvolt with the SVS voltage 725000uV arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
Comments
On 6.04.2023 09:00, Devi Priya wrote: > Add support for SMPA1 regulator node in IPQ9574. > > Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> > Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> > Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> > --- > Changes in V3: > - Updated the regulator-min-microvolt with the SVS voltage 725000uV > > arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts > index 3ae38cf327ea..06f579b1c590 100644 > --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts > +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts > @@ -44,6 +44,25 @@ > }; > }; > > +&rpm_requests { > + regulators { > + compatible = "qcom,rpm-mp5496-regulators"; > + > + ipq9574_s1: s1 { > + /* > + * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. > + * During regulator registration, kernel not knowing the initial voltage, > + * considers it as zero and brings up the regulators with minimum supported voltage. > + * Updating the regulator-min-microvolt with SVS voltage of 725000uV so that s/Updating/Update s/725000uV/725mV here and below (for consistency with the first mention of 800mV) Konrad > + * the regulators are brought up with 725000uV which is sufficient for all the > + * corner parts to operate at 800MHz > + */ > + regulator-min-microvolt = <725000>; > + regulator-max-microvolt = <1075000>; > + }; > + }; > +}; > + > &pcie1_phy { > status = "okay"; > };
On 4/7/2023 1:17 AM, Konrad Dybcio wrote: > > > On 6.04.2023 09:00, Devi Priya wrote: >> Add support for SMPA1 regulator node in IPQ9574. >> >> Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com> >> Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com> >> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> >> --- >> Changes in V3: >> - Updated the regulator-min-microvolt with the SVS voltage 725000uV >> >> arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts >> index 3ae38cf327ea..06f579b1c590 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts >> +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts >> @@ -44,6 +44,25 @@ >> }; >> }; >> >> +&rpm_requests { >> + regulators { >> + compatible = "qcom,rpm-mp5496-regulators"; >> + >> + ipq9574_s1: s1 { >> + /* >> + * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. >> + * During regulator registration, kernel not knowing the initial voltage, >> + * considers it as zero and brings up the regulators with minimum supported voltage. > >> + * Updating the regulator-min-microvolt with SVS voltage of 725000uV so that > s/Updating/Update > s/725000uV/725mV here and below (for consistency with the first mention > of 800mV) > Sure, will update! > Konrad >> + * the regulators are brought up with 725000uV which is sufficient for all the >> + * corner parts to operate at 800MHz >> + */ >> + regulator-min-microvolt = <725000>; >> + regulator-max-microvolt = <1075000>; >> + }; >> + }; >> +}; >> + >> &pcie1_phy { >> status = "okay"; >> };
diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts index 3ae38cf327ea..06f579b1c590 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts @@ -44,6 +44,25 @@ }; }; +&rpm_requests { + regulators { + compatible = "qcom,rpm-mp5496-regulators"; + + ipq9574_s1: s1 { + /* + * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders. + * During regulator registration, kernel not knowing the initial voltage, + * considers it as zero and brings up the regulators with minimum supported voltage. + * Updating the regulator-min-microvolt with SVS voltage of 725000uV so that + * the regulators are brought up with 725000uV which is sufficient for all the + * corner parts to operate at 800MHz + */ + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1075000>; + }; + }; +}; + &pcie1_phy { status = "okay"; };