From patchwork Wed Apr 5 19:47:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 79893 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp553377vqo; Wed, 5 Apr 2023 12:53:24 -0700 (PDT) X-Google-Smtp-Source: AKy350YHTu952r3/RZIoO7JDULKCW7m9kf/Lls75zfaIvS4/yrbPmMFpKQ5l9QVVBvwVYo19CFmb X-Received: by 2002:a17:906:c005:b0:947:55ce:1217 with SMTP id e5-20020a170906c00500b0094755ce1217mr3934926ejz.73.1680724403862; Wed, 05 Apr 2023 12:53:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680724403; cv=none; d=google.com; s=arc-20160816; b=CCWpSdMbu4/NOLNfXBQdMh0AZye9KfEsbr4134HDuaPrXPAJZ1/pL77nf7KWiEOPmb LCYkHXsGM5gFHjcZaAAGNnqTSlnSIHecqYYb9yxs4UsqmuXy3qtD24c75c3Zl9+e2C32 BthbzDg7f1TMe+/E4US5hE/PYau26qeEpjkvriz2kB2uGYOGOWXuRCyCqKWzVo93LYQ2 gc/HFnItYHTI8LpNyTVCCDWMTYav9ijI1L2swLiokp35QLeH/UhMnWCOcWdaaIlgsJf4 cjJ0lJGNe+ZZOq6ud9MyeXeXujn5O2xNe8C0bZo3k4NSSM9EAgo9QMy12NfAO1CrRs8S nOLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+HY613/cWpilX/UQhldIyeAAp/lXCX0yrKtKN9LFBRw=; b=IgVzhE6sGo8umK9hcpysgHEf7NUDzm4gTBW6QlSqIiuwi9Q6OqwPYCNCQeWCla9yJw 2vOchz81Avx503DQOanVRJwLPScRC1PSYsiLgyFGr5fIf7AkS4WefITSObMsT4jWURwY 6kZ4U6u75J/WSHkJFVxwznjxbIaq0fc+vSRJbNLOL4UYgDe0ausrbE2pDOdpf3lcBVjI GH4CrlGwsZMfplINvoiBIBKBvjSUb1lDwUm4oc+qVgUAkp82HgGYZRSv9cFwg9txMVN3 mxV3JKiaVVCVoAa2OtqHRkTjbDj0Qzs/MTAFDGDWBbyr/Q0T74y5ojk7Cp8mNsie0nJt tvHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=jI54pcEo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id qw28-20020a1709066a1c00b00948b988992csi7764030ejc.920.2023.04.05.12.52.59; Wed, 05 Apr 2023 12:53:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=jI54pcEo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234366AbjDETsc (ORCPT + 99 others); Wed, 5 Apr 2023 15:48:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233254AbjDETsM (ORCPT ); Wed, 5 Apr 2023 15:48:12 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D701E69; Wed, 5 Apr 2023 12:48:04 -0700 (PDT) Received: from localhost (unknown [188.27.34.213]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id A574F6602F91; Wed, 5 Apr 2023 20:48:02 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680724082; bh=qXAW+NxBtXP2ZLN97K9FdNC+pkjm39ZBXXRQWxqaxDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jI54pcEom6oKehCae89+key+iuWfRqK5M0z93IuXr/3R84HmEvBny+6oNQVYpir36 Al1wn80Py1T1YTc00wy0s4oOHM79qjxwLKx1kVM61UtrvL2S/jsKDTUENk94dZW/Ji Ci7Rm/b2OL186mgFEnfDoBjA9ON2U1gs81gheRu2CX4YeVoy1O+lCwxZwiSDb3EI75 iQgyHtcjgyYH+6kIROaWPPMkv+g0DZL1B62RKb5YReT8r4f5gWtucpWArsTmxrxlkl 45Kc2my4uQ+9+66IEvn7AWn7zN8epKUYwiK88EBFr/rgRev1GKIMrI7uj75X1CySK+ EyvvIOG82m4Lw== From: Cristian Ciocaltea To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Bjorn Andersson , Joseph Chen , Ezequiel Garcia Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH 5/8] regulator: fan53555: Make use of the bit macros Date: Wed, 5 Apr 2023 22:47:18 +0300 Message-Id: <20230405194721.821536-6-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230405194721.821536-1-cristian.ciocaltea@collabora.com> References: <20230405194721.821536-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762367272644515559?= X-GMAIL-MSGID: =?utf-8?q?1762367272644515559?= For consistency and improved clarity, use BIT() and GENMASK() macros for defining the bitfields inside the registers. No functional changes intended. While here, also fix DIE_{ID,REV} inconsistent indentation. Signed-off-by: Cristian Ciocaltea --- drivers/regulator/fan53555.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c index 68ebcd4ccef7..181e5eb00e7a 100644 --- a/drivers/regulator/fan53555.c +++ b/drivers/regulator/fan53555.c @@ -41,23 +41,23 @@ #define FAN53555_MONITOR 0x05 /* VSEL bit definitions */ -#define VSEL_BUCK_EN (1 << 7) -#define VSEL_MODE (1 << 6) +#define VSEL_BUCK_EN BIT(7) +#define VSEL_MODE BIT(6) /* Chip ID and Verison */ -#define DIE_ID 0x0F /* ID1 */ -#define DIE_REV 0x0F /* ID2 */ +#define DIE_ID 0x0F /* ID1 */ +#define DIE_REV 0x0F /* ID2 */ /* Control bit definitions */ -#define CTL_OUTPUT_DISCHG (1 << 7) -#define CTL_SLEW_MASK (0x7 << 4) -#define CTL_RESET (1 << 2) +#define CTL_OUTPUT_DISCHG BIT(7) +#define CTL_SLEW_MASK GENMASK(6, 4) +#define CTL_RESET BIT(2) #define CTL_MODE_VSEL0_MODE BIT(0) #define CTL_MODE_VSEL1_MODE BIT(1) #define FAN53555_NVOLTAGES 64 /* Numbers of voltages */ #define FAN53526_NVOLTAGES 128 -#define TCS_VSEL0_MODE (1 << 7) -#define TCS_VSEL1_MODE (1 << 6) +#define TCS_VSEL0_MODE BIT(7) +#define TCS_VSEL1_MODE BIT(6) #define TCS_SLEW_MASK GENMASK(4, 3)