Message ID | 20230405130317.9351-1-kvijayab@amd.com |
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[v2] iommu/amd: Fix "Guest Virtual APIC Table Root Pointer" configuration in IRTE
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Commit Message
Kishon Vijay Abraham I
April 5, 2023, 1:03 p.m. UTC
commit b9c6ff94e43a ("iommu/amd: Re-factor guest virtual APIC (de-)activation code") while refactoring guest virtual APIC activation/de-activation code, stored information for activate/de-activate in "struct amd_ir_data". It used 32-bit integer data type for storing the "Guest Virtual APIC Table Root Pointer" (ga_root_ptr), though the "ga_root_ptr" is actually a 40-bit field in IRTE (Interrupt Remapping Table Entry). This causes interrupts from PCIe devices to not reach the guest in the case of PCIe passthrough with SME (Secure Memory Encryption) enabled as _SME_ bit in the "ga_root_ptr" is lost before writing it to the IRTE. Fix it by using 64-bit data type for storing the "ga_root_ptr". While at that also change the data type of "ga_tag" to u32 in order to match the IOMMU spec. Fixes: b9c6ff94e43a ("iommu/amd: Re-factor guest virtual APIC (de-)activation code") Cc: stable@vger.kernel.org # v5.4+ Reported-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Kishon Vijay Abraham I <kvijayab@amd.com> --- Changes from v1: *) Fixed ga_tag to 32-bit data type as suggested by Joao Martins *) Changing ga_vector to u8 to align with IOMMU spec can be done as a separate change since there are other data structures like vcpu_data which is using ga_vector as 32-bit data type. drivers/iommu/amd/amd_iommu_types.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On Wed, Apr 05, 2023 at 01:03:17PM +0000, Kishon Vijay Abraham I wrote: > commit b9c6ff94e43a ("iommu/amd: Re-factor guest virtual APIC > (de-)activation code") while refactoring guest virtual APIC > activation/de-activation code, stored information for activate/de-activate > in "struct amd_ir_data". It used 32-bit integer data type for storing the > "Guest Virtual APIC Table Root Pointer" (ga_root_ptr), though the > "ga_root_ptr" is actually a 40-bit field in IRTE (Interrupt Remapping > Table Entry). > > This causes interrupts from PCIe devices to not reach the guest in the case > of PCIe passthrough with SME (Secure Memory Encryption) enabled as _SME_ > bit in the "ga_root_ptr" is lost before writing it to the IRTE. > > Fix it by using 64-bit data type for storing the "ga_root_ptr". While at > that also change the data type of "ga_tag" to u32 in order to match > the IOMMU spec. > > Fixes: b9c6ff94e43a ("iommu/amd: Re-factor guest virtual APIC (de-)activation code") > Cc: stable@vger.kernel.org # v5.4+ > Reported-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> > Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> > Signed-off-by: Kishon Vijay Abraham I <kvijayab@amd.com> Applied, thanks.
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h index 3d684190b4d5..f7cb1ce0f9bb 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b/drivers/iommu/amd/amd_iommu_types.h @@ -1001,8 +1001,8 @@ struct amd_ir_data { */ struct irq_cfg *cfg; int ga_vector; - int ga_root_ptr; - int ga_tag; + u64 ga_root_ptr; + u32 ga_tag; }; struct amd_irte_ops {