[v6,8/8] arm64: dts: qcom: sa8540-ride: Enable first port of tertiary usb controller
Message ID | 20230405125759.4201-9-quic_kriskura@quicinc.com |
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State | New |
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Wed, 05 Apr 2023 12:59:25 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 335CxIqK007669 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 5 Apr 2023 12:59:18 GMT Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 5 Apr 2023 05:59:12 -0700 From: Krishna Kurapati <quic_kriskura@quicinc.com> To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Philipp Zabel <p.zabel@pengutronix.de>, "Andy Gross" <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, "Konrad Dybcio" <konrad.dybcio@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> CC: <linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <quic_pkondeti@quicinc.com>, <quic_ppratap@quicinc.com>, <quic_wcheng@quicinc.com>, <quic_jackp@quicinc.com>, <quic_harshq@quicinc.com>, <ahalaney@redhat.com>, <quic_shazhuss@quicinc.com>, Krishna Kurapati <quic_kriskura@quicinc.com> Subject: [PATCH v6 8/8] arm64: dts: qcom: sa8540-ride: Enable first port of tertiary usb controller Date: Wed, 5 Apr 2023 18:27:59 +0530 Message-ID: <20230405125759.4201-9-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230405125759.4201-1-quic_kriskura@quicinc.com> References: <20230405125759.4201-1-quic_kriskura@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: F1bW7jzLHmuIkNgUv2jozTfyaYJAFitj X-Proofpoint-ORIG-GUID: F1bW7jzLHmuIkNgUv2jozTfyaYJAFitj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-05_08,2023-04-05_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 malwarescore=0 phishscore=0 priorityscore=1501 bulkscore=0 mlxlogscore=982 adultscore=0 lowpriorityscore=0 mlxscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304050118 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762342735504150761?= X-GMAIL-MSGID: =?utf-8?q?1762342735504150761?= |
Series |
Add multiport support for DWC3 controllers
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Commit Message
Krishna Kurapati
April 5, 2023, 12:57 p.m. UTC
Enable first port of Quad port Tertiary USB controller for SA8540 Ride.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
---
Link to v5: https://lore.kernel.org/all/20230310163420.7582-9-quic_kriskura@quicinc.com/
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
Comments
On Wed, Apr 05, 2023 at 06:27:59PM +0530, Krishna Kurapati wrote: > Enable first port of Quad port Tertiary USB controller for SA8540 Ride. > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> This is nitpicky, but I liked some of the description in the first[0] version of this patch that I authored for you: From dcb27d07f079194ebd7efe1c9bec64da78beb290 Mon Sep 17 00:00:00 2001 From: Andrew Halaney <ahalaney@redhat.com> Date: Thu, 19 Jan 2023 14:53:38 -0600 Subject: [PATCH] arm64: dts: qcom: sa8540p-ride: Enable usb_2 Content-type: text/plain There is now support for the multiport USB controller this uses so enable it. The board only has a single port hooked up (despite it being wired up to the multiport IP on the SoC). There's also a USB 2.0 mux hooked up, which by default on boot is selected to mux properly. Grab the gpio controlling that and ensure it stays in the right position so USB 2.0 continues to be routed from the external port to the SoC. Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Specifically the bit helping explain what the mux, its default state, etc are things I find explain some of the hardware/patch better. Personal opinion of course but I'll highlight it since you dropped it out :) [0] https://lore.kernel.org/linux-arm-msm/20230119220942.ja5gbo3t3fl63gpy@halaney-x13s/ Either way, thanks for taking the patch along and working on this. Thanks, Andrew
On 4/14/2023 9:21 PM, Andrew Halaney wrote: > On Wed, Apr 05, 2023 at 06:27:59PM +0530, Krishna Kurapati wrote: >> Enable first port of Quad port Tertiary USB controller for SA8540 Ride. >> >> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > > This is nitpicky, but I liked some of the description in the first[0] > version of this patch that I authored for you: > > From dcb27d07f079194ebd7efe1c9bec64da78beb290 Mon Sep 17 00:00:00 2001 > From: Andrew Halaney <ahalaney@redhat.com> > Date: Thu, 19 Jan 2023 14:53:38 -0600 > Subject: [PATCH] arm64: dts: qcom: sa8540p-ride: Enable usb_2 > Content-type: text/plain > > There is now support for the multiport USB controller this uses > so enable it. > > The board only has a single port hooked up (despite it being wired up to > the multiport IP on the SoC). There's also a USB 2.0 mux hooked up, > which by default on boot is selected to mux properly. Grab the gpio > controlling that and ensure it stays in the right position so USB 2.0 > continues to be routed from the external port to the SoC. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > > Specifically the bit helping explain what the mux, its default state, > etc are things I find explain some of the hardware/patch better. Personal > opinion of course but I'll highlight it since you dropped it out :) > > [0] https://lore.kernel.org/linux-arm-msm/20230119220942.ja5gbo3t3fl63gpy@halaney-x13s/ > > Either way, thanks for taking the patch along and working on this. > > Thanks, > Andrew > Hi Andrew, Sorry for that. Will make sure to update the commit text with this info in the next version. Regards, Krishna,
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 24fa449d48a6..53d47593306e 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -309,6 +309,19 @@ &usb_2_qmpphy0 { status = "okay"; }; +&usb_2 { + pinctrl-names = "default"; + pinctrl-0 = <&usb2_en_state>; + + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; + phy-names = "usb2-port0", "usb3-port0"; + phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>; +}; + &xo_board_clk { clock-frequency = <38400000>; }; @@ -401,4 +414,13 @@ wake-pins { bias-pull-up; }; }; + + usb2_en_state: usb2-en-state { + /* TS3USB221A USB2.0 mux select */ + pins = "gpio24"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; };