diff mbox series

[V4,10/23] RISC-V: smpboot: Create wrapper smp_setup()

Message ID	20230404182037.863533-11-sunilvl@ventanamicro.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Sunil V L <sunilvl@ventanamicro.com> To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-crypto@vger.kernel.org, platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev Cc: Jonathan Corbet <corbet@lwn.net>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Len Brown <lenb@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Weili Qian <qianweili@huawei.com>, Zhou Wang <wangzhou1@hisilicon.com>, Herbert Xu <herbert@gondor.apana.org.au>, Marc Zyngier <maz@kernel.org>, Maximilian Luz <luzmaximilian@gmail.com>, Hans de Goede <hdegoede@redhat.com>, Mark Gross <markgross@kernel.org>, Nathan Chancellor <nathan@kernel.org>, Nick Desaulniers <ndesaulniers@google.com>, Tom Rix <trix@redhat.com>, "Rafael J . Wysocki" <rafael@kernel.org>, "David S . Miller" <davem@davemloft.net>, Sunil V L <sunilvl@ventanamicro.com>, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>, Conor Dooley <conor.dooley@microchip.com>, Andrew Jones <ajones@ventanamicro.com> Subject: [PATCH V4 10/23] RISC-V: smpboot: Create wrapper smp_setup() Date: Tue, 4 Apr 2023 23:50:24 +0530 Message-Id: <20230404182037.863533-11-sunilvl@ventanamicro.com> In-Reply-To: <20230404182037.863533-1-sunilvl@ventanamicro.com> References: <20230404182037.863533-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add basic ACPI support for RISC-V \| [V4,00/23] Add basic ACPI support for RISC-V [V4,01/23] riscv: move sbi_init() earlier before jump_label_init() [V4,02/23] ACPICA: MADT: Add RISC-V INTC interrupt controller [V4,03/23] ACPICA: Add structure definitions for RISC-V RHCT [V4,04/23] ACPI: tables: Print RINTC information when MADT is parsed [V4,05/23] ACPI: OSL: Make should_use_kmap() 0 for RISC-V [V4,06/23] RISC-V: Add support to build the ACPI core [V4,07/23] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid [V4,08/23] RISC-V: ACPI: Cache and retrieve the RINTC structure [V4,09/23] drivers/acpi: RISC-V: Add RHCT related code [V4,10/23] RISC-V: smpboot: Create wrapper smp_setup() [V4,11/23] RISC-V: smpboot: Add ACPI support in smp_setup() [V4,12/23] RISC-V: cpufeature: Avoid calling riscv_of_processor_hartid() [V4,13/23] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() [V4,14/23] RISC-V: cpu: Enable cpuinfo for ACPI systems [V4,15/23] irqchip/riscv-intc: Add ACPI support [V4,16/23] clocksource/timer-riscv: Refactor riscv_timer_init_dt() [V4,17/23] clocksource/timer-riscv: Add ACPI support [V4,18/23] RISC-V: time.c: Add ACPI support for time_init() [V4,19/23] RISC-V: Add ACPI initialization in setup_arch() [V4,20/23] RISC-V: Enable ACPI in defconfig [V4,21/23] MAINTAINERS: Add entry for drivers/acpi/riscv [V4,22/23] platform/surface: Disable for RISC-V [V4,23/23] crypto: hisilicon/qm: Workaround to enable build with RISC-V clang

Commit Message

Sunil V L April 4, 2023, 6:20 p.m. UTC

  smp_setup() currently assumes DT-based platforms. To enable ACPI,
first make this a wrapper function and move existing code to
a separate DT-specific function.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/kernel/smpboot.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Palmer Dabbelt April 26, 2023, 6:45 p.m. UTC | #1

On Tue, 04 Apr 2023 11:20:24 PDT (-0700), sunilvl@ventanamicro.com wrote:
> smp_setup() currently assumes DT-based platforms. To enable ACPI,
> first make this a wrapper function and move existing code to
> a separate DT-specific function.
>
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>  arch/riscv/kernel/smpboot.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index 00b53913d4c6..26214ddefaa4 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -70,7 +70,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
>  	}
>  }
>
> -void __init setup_smp(void)
> +static void __init of_parse_and_init_cpus(void)
>  {
>  	struct device_node *dn;
>  	unsigned long hart;
> @@ -116,6 +116,11 @@ void __init setup_smp(void)
>  	}
>  }
>
> +void __init setup_smp(void)
> +{
> +	of_parse_and_init_cpus();
> +}
> +
>  static int start_secondary_cpu(int cpu, struct task_struct *tidle)
>  {
>  	if (cpu_ops[cpu]->cpu_start)

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

diff mbox series

Patch

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 00b53913d4c6..26214ddefaa4 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -70,7 +70,7 @@  void __init smp_prepare_cpus(unsigned int max_cpus)
 	}
 }
 
-void __init setup_smp(void)
+static void __init of_parse_and_init_cpus(void)
 {
 	struct device_node *dn;
 	unsigned long hart;
@@ -116,6 +116,11 @@  void __init setup_smp(void)
 	}
 }
 
+void __init setup_smp(void)
+{
+	of_parse_and_init_cpus();
+}
+
 static int start_secondary_cpu(int cpu, struct task_struct *tidle)
 {
 	if (cpu_ops[cpu]->cpu_start)