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[2620:137:e000::1:20]) by mx.google.com with ESMTP id x10-20020a17090aa38a00b0023f14c9a5fesi9525742pjp.100.2023.04.04.03.54.22; Tue, 04 Apr 2023 03:54:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="P0haN/ki"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234638AbjDDKsk (ORCPT + 99 others); Tue, 4 Apr 2023 06:48:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234550AbjDDKsO (ORCPT ); Tue, 4 Apr 2023 06:48:14 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A07D1BD7 for ; Tue, 4 Apr 2023 03:48:13 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id B47AF6603248; Tue, 4 Apr 2023 11:48:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1680605292; bh=tcQ9BX88nK9YxCCQgMpPmnIGYL+QZroOMn+8gvsxyw8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P0haN/kimeW4Mcc5mvkbjr2J/kgNSrwZBhMOihrTSNAZrZNm0LRl8tk910dEGRAac 28g3oneEz6gUiN3PnJmk8wUH0Uc9UGdE2yzib0fhlq/Tg8Ya63yzzS6vSU5k3WS+uL zoEWY5RCdreDJSjIf27zsJ2T+V63etk7zrkPYKc9Cx/8iL6XhX+Pyn7RjCSYGWGXqR MrECPvXM4Q2xmkOoFFXQfIv9MCf2O8xjYmySpe12giowJAVTET2ApLVOPEABDlgQLU dU03srC+DL9Lz1UepObT7rTDqPKIQEH5xZSQNAP/24K3PW0FFSwPqXquMyOETOcQPs DKuQGdyFB9bkQ== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, wenst@chromium.org Subject: [PATCH v3 8/9] drm/mediatek: dp: Move AUX_P0 setting to mtk_dp_initialize_aux_settings() Date: Tue, 4 Apr 2023 12:47:59 +0200 Message-Id: <20230404104800.301150-9-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230404104800.301150-1-angelogioacchino.delregno@collabora.com> References: <20230404104800.301150-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762242776227776292?= X-GMAIL-MSGID: =?utf-8?q?1762242776227776292?= Move the register write to MTK_DP_AUX_P0_3690 to set the AUX reply mode to function mtk_dp_initialize_aux_settings(), as this is effectively part of the DPTX AUX setup sequence. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_dp.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c index 62d53c4b3feb..a67143c22024 100644 --- a/drivers/gpu/drm/mediatek/mtk_dp.c +++ b/drivers/gpu/drm/mediatek/mtk_dp.c @@ -1012,6 +1012,11 @@ static void mtk_dp_initialize_aux_settings(struct mtk_dp *mtk_dp) mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_37C8, MTK_ATOP_EN_AUX_TX_P0, MTK_ATOP_EN_AUX_TX_P0); + + /* Set complete reply mode for AUX */ + mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, + RX_REPLY_COMPLETE_MODE_AUX_TX_P0, + RX_REPLY_COMPLETE_MODE_AUX_TX_P0); } static void mtk_dp_initialize_digital_settings(struct mtk_dp *mtk_dp) @@ -1824,10 +1829,6 @@ static void mtk_dp_init_port(struct mtk_dp *mtk_dp) mtk_dp_initialize_settings(mtk_dp); mtk_dp_initialize_aux_settings(mtk_dp); mtk_dp_initialize_digital_settings(mtk_dp); - - mtk_dp_update_bits(mtk_dp, MTK_DP_AUX_P0_3690, - RX_REPLY_COMPLETE_MODE_AUX_TX_P0, - RX_REPLY_COMPLETE_MODE_AUX_TX_P0); mtk_dp_initialize_hpd_detect_settings(mtk_dp); mtk_dp_digital_sw_reset(mtk_dp);