Allow flow control, speed, and duplex settings on the CPU port to be
configurable. Previously, the speed and duplex relied on default switch
values, which limited flexibility. Additionally, flow control was
hardcoded and only functional in duplex mode. This update enhances the
configurability of these parameters.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
drivers/net/dsa/microchip/ksz8.h | 4 ++
drivers/net/dsa/microchip/ksz8795.c | 54 ++++++++++++++++++++++----
drivers/net/dsa/microchip/ksz_common.c | 1 +
3 files changed, 51 insertions(+), 8 deletions(-)
@@ -58,5 +58,9 @@ int ksz8_switch_detect(struct ksz_device *dev);
int ksz8_switch_init(struct ksz_device *dev);
void ksz8_switch_exit(struct ksz_device *dev);
int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu);
+void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
+ unsigned int mode, phy_interface_t interface,
+ struct phy_device *phydev, int speed, int duplex,
+ bool tx_pause, bool rx_pause);
#endif
@@ -1321,12 +1321,52 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)
if (remote & KSZ8_PORT_FIBER_MODE)
p->fiber = 1;
}
- if (p->fiber)
- ksz_port_cfg(dev, i, regs[P_STP_CTRL],
- PORT_FORCE_FLOW_CTRL, true);
- else
- ksz_port_cfg(dev, i, regs[P_STP_CTRL],
- PORT_FORCE_FLOW_CTRL, false);
+ }
+}
+
+void ksz8_phylink_mac_link_up(struct ksz_device *dev, int port,
+ unsigned int mode, phy_interface_t interface,
+ struct phy_device *phydev, int speed, int duplex,
+ bool tx_pause, bool rx_pause)
+{
+ struct dsa_switch *ds = dev->ds;
+ struct ksz_port *p;
+ u8 ctrl = 0;
+
+ p = &dev->ports[port];
+
+ if (dsa_upstream_port(ds, port)) {
+ u8 mask = SW_HALF_DUPLEX_FLOW_CTRL | SW_HALF_DUPLEX |
+ SW_FLOW_CTRL | SW_10_MBIT;
+
+ if (duplex) {
+ if (tx_pause && rx_pause)
+ ctrl |= SW_FLOW_CTRL;
+ } else {
+ ctrl |= SW_HALF_DUPLEX;
+ if (tx_pause && rx_pause)
+ ctrl |= SW_HALF_DUPLEX_FLOW_CTRL;
+ }
+
+ if (speed == SPEED_10)
+ ctrl |= SW_10_MBIT;
+
+ ksz_rmw8(dev, REG_SW_CTRL_4, mask, ctrl);
+
+ p->phydev.speed = speed;
+ } else {
+ const u16 *regs = dev->info->regs;
+
+ if (duplex) {
+ if (tx_pause && rx_pause)
+ ctrl |= PORT_FORCE_FLOW_CTRL;
+ } else {
+ if (tx_pause && rx_pause)
+ ctrl |= PORT_BACK_PRESSURE;
+ }
+
+ ksz_rmw8(dev, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL |
+ PORT_BACK_PRESSURE, ctrl);
}
}
@@ -1380,8 +1420,6 @@ int ksz8_setup(struct dsa_switch *ds)
*/
ds->vlan_filtering_is_global = true;
- ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_FLOW_CTRL, true);
-
/* Enable automatic fast aging when link changed detected. */
ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);
@@ -208,6 +208,7 @@ static const struct ksz_dev_ops ksz8_dev_ops = {
.mirror_add = ksz8_port_mirror_add,
.mirror_del = ksz8_port_mirror_del,
.get_caps = ksz8_get_caps,
+ .phylink_mac_link_up = ksz8_phylink_mac_link_up,
.config_cpu_port = ksz8_config_cpu_port,
.enable_stp_addr = ksz8_enable_stp_addr,
.reset = ksz8_reset_switch,