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[83.9.1.37]) by smtp.gmail.com with ESMTPSA id o28-20020ac2495c000000b004eb2db994e7sm2869344lfi.239.2023.04.05.08.51.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 08:51:02 -0700 (PDT) From: Konrad Dybcio Date: Wed, 05 Apr 2023 17:50:34 +0200 Subject: [PATCH v2 5/5] arm64: dts: qcom: Add initial QTI RB1 device tree MIME-Version: 1.0 Message-Id: <20230403-topic-rb1_qcm-v2-5-dae06f8830dc@linaro.org> References: <20230403-topic-rb1_qcm-v2-0-dae06f8830dc@linaro.org> In-Reply-To: <20230403-topic-rb1_qcm-v2-0-dae06f8830dc@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Robert Marko , Das Srinagesh Cc: Bhupesh Sharma , Vladimir Zapolskiy , Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1680709854; l=3548; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=rcgGXCqBpdi+rXuFSqHjCoOhi1FGiWNalz4gX3uEVPQ=; b=XTOsV6pxALvtz+ctQD4JVaAehGJXVPUF3+zvh8TOJ+T75Gy635wEghnJnN7ldIWBcipQaB2KkA2M kZrzxcpxCsaxG0RZ25o1LGSlNsMwpB1/W+XWQmAyFozwSW5Ao6gH X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762353087534218135?= X-GMAIL-MSGID: =?utf-8?q?1762353087534218135?= Add an initial device tree for the QTI RB1 development board, based on the QRB2210 (QCM2290 derivative) SoC. This device tree targets the SoM revision 4, a.k.a. the Mass Production SKU. To get a successful boot, run: cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/qrb2210-rb1.dtb >\ .Image.gz-dtb mkbootimg \ --kernel .Image.gz-dtb \ --ramdisk some_initrd \ --output rb1-boot.img \ --pagesize 4096 \ --base 0x8000 \ --cmdline 'some cmdline' fastboot boot rb1-boot.img There's no dtbo or other craziness to worry about. For the best dev experience, you can erase boot and use fastboot boot everytime, so that the bootloader doesn't mess with you. If you have a SoM revision 3 or older (there should be a sticker on it with text like -r00, where r is the revision), you will need to apply this additional diff: aliases { - serial0 = &uart0; + serial0 = &uart4; /* UART connected to the Micro-USB port via a FTDI chip */ - &uart0 { + &uart4 { That should however only concern preproduction boards. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 112 +++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts new file mode 100644 index 000000000000..ef3616093289 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2023, Linaro Ltd + */ + +/dts-v1/; + +#include "qcm2290.dtsi" +#include "pm2250.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Robotics RB1"; + compatible = "qcom,qrb2210-rb1", "qcom,qrb2210", "qcom,qcm2290"; + + aliases { + serial0 = &uart0; + sdhc1 = &sdhc_1; + sdhc2 = &sdhc_2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-0 = <&key_volp_n>; + pinctrl-names = "default"; + + key-volume-up { + label = "Volume Up"; + linux,code = ; + gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + }; + }; +}; + +&pm2250_resin { + linux,code = ; + status = "okay"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&sdhc_1 { + pinctrl-0 = <&sdc1_state_on>; + pinctrl-1 = <&sdc1_state_off>; + pinctrl-names = "default", "sleep"; + non-removable; + supports-cqe; + no-sdio; + no-sd; + status = "okay"; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sdc2_state_on &sd_det_in_on>; + pinctrl-1 = <&sdc2_state_off &sd_det_in_off>; + pinctrl-names = "default", "sleep"; + no-sdio; + no-mmc; + status = "okay"; +}; + +&tlmm { + sd_det_in_on: sd-det-in-on-state { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + sd_det_in_off: sd-det-in-off-state { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + key_volp_n: key-volp-n-state { + pins = "gpio96"; + function = "gpio"; + bias-pull-up; + output-disable; + }; +}; + +/* UART connected to the Micro-USB port via a FTDI chip */ +&uart0 { + compatible = "qcom,geni-debug-uart"; + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&usb_hsphy { + status = "okay"; +}; + +&xo_board { + clock-frequency = <38400000>; +};