Message ID | 20230331154651.3107173-3-arnaud.pouliquen@foss.st.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id r20-20020a635d14000000b0051322a6bf76si2450615pgb.77.2023.03.31.08.57.34; Fri, 31 Mar 2023 08:57:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=EP8ac7L8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233294AbjCaPrm (ORCPT <rfc822;dexuan.linux@gmail.com> + 99 others); Fri, 31 Mar 2023 11:47:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40490 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232953AbjCaPrc (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 31 Mar 2023 11:47:32 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8342130F0; Fri, 31 Mar 2023 08:47:31 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32VEudSD029004; Fri, 31 Mar 2023 17:47:17 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=4+o068s17JcYDuxCnjJGX6YoOMN2Cbu4UUex4Zuq5vA=; b=EP8ac7L8ocq6z10FwNtr/nOIcZPaSjRWsUAQFRGk/BsyBHDSB54tzjCDgpxjxYtcTf+b t7WS7vZA04tAUBvyKe+WPwDQ7/fcqFJ5Eqa3JTa8o3iY9H1n21FcLlFzUHiCl+elef5V +RZ4CKBSgjJCLaPWfAKHOb0gkvNDDtrxIVfCfPzSzBGQW0o4i1FfWJSjS956q89/ZGF6 PUt0wRAN5gVi0/ahHZj/EeYe73oQmhjykcAbfPTU0bIqQC8uTB/DcROSosN/e6uTyOjP shLRGveizHZdNmnkTzGcQ3g9uXFA6Mt1p1dYnFYgiVNWuGafzWPMzEaI/i3mqvx9zWlc rg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3pnwt09tmp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 31 Mar 2023 17:47:17 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B8F03100038; Fri, 31 Mar 2023 17:47:16 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B2C03222CAF; Fri, 31 Mar 2023 17:47:16 +0200 (CEST) Received: from localhost (10.201.21.178) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.17; Fri, 31 Mar 2023 17:47:15 +0200 From: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> To: Bjorn Andersson <andersson@kernel.org>, Mathieu Poirier <mathieu.poirier@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Alexandre Torgue <alexandre.torgue@foss.st.com> CC: <linux-remoteproc@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <devicetree@vger.kernel.org>, <arnaud.pouliquen@foss.st.com> Subject: [PATCH 2/5] ARM: dts: stm32: Remove the st,syscfg-tz property Date: Fri, 31 Mar 2023 17:46:48 +0200 Message-ID: <20230331154651.3107173-3-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> References: <20230331154651.3107173-1-arnaud.pouliquen@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.178] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761899465077146913?= X-GMAIL-MSGID: =?utf-8?q?1761899465077146913?= |
Series |
stm32mp15: update remoteproc to support SCMI Device tree
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Commit Message
Arnaud POULIQUEN
March 31, 2023, 3:46 p.m. UTC
Since the introduction of the SCMI server for the management
of the MCU hold boot in OPTEE, management of the hold boot by smc call
is deprecated.
Clean the st,syscfg-tz which allows to determine if the trust
zone is enable.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
---
arch/arm/boot/dts/stm32mp151.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On 3/31/23 17:46, Arnaud Pouliquen wrote: > Since the introduction of the SCMI server for the management > of the MCU hold boot in OPTEE, management of the hold boot by smc call > is deprecated. > Clean the st,syscfg-tz which allows to determine if the trust > zone is enable. Please don't waste time to review the commit message above! The subject and the commit message is not aligned with the commit update I need to rework it in a V2. I'm waiting few days before sending the V2, allowing people to comment V1. For V2 I will probably copy/past the commit message of: [PATCH 1/5] dt-bindings: remoteproc: st,stm32-rproc: Rework reset declarations Regards, Arnaud > > Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> > --- > arch/arm/boot/dts/stm32mp151.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi > index 4e437d3f2ed6..25626797db94 100644 > --- a/arch/arm/boot/dts/stm32mp151.dtsi > +++ b/arch/arm/boot/dts/stm32mp151.dtsi > @@ -1820,8 +1820,8 @@ m4_rproc: m4@10000000 { > <0x30000000 0x40000>, > <0x38000000 0x10000>; > resets = <&rcc MCU_R>; > + reset-names = "mcu_rst"; > st,syscfg-holdboot = <&rcc 0x10C 0x1>; > - st,syscfg-tz = <&rcc 0x000 0x1>; > st,syscfg-pdds = <&pwr_mcu 0x0 0x1>; > st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; > st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 4e437d3f2ed6..25626797db94 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1820,8 +1820,8 @@ m4_rproc: m4@10000000 { <0x30000000 0x40000>, <0x38000000 0x10000>; resets = <&rcc MCU_R>; + reset-names = "mcu_rst"; st,syscfg-holdboot = <&rcc 0x10C 0x1>; - st,syscfg-tz = <&rcc 0x000 0x1>; st,syscfg-pdds = <&pwr_mcu 0x0 0x1>; st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;