diff mbox series

ARM: dts: stm32: add FMC support on STM32MP13x SoC family

Message ID 20230328122606.191211-1-christophe.kerello@foss.st.com
State New
Headers
Series ARM: dts: stm32: add FMC support on STM32MP13x SoC family |

Commit Message

Christophe Kerello March 28, 2023, 12:26 p.m. UTC 
  This patch adds the FMC support on STM32MP13x SoC family.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
---
 arch/arm/boot/dts/stm32mp131.dtsi | 34 +++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Krzysztof Kozlowski March 28, 2023, 2:53 p.m. UTC | #1 
On 28/03/2023 14:26, Christophe Kerello wrote:
> This patch adds the FMC support on STM32MP13x SoC family.

Do not use "This commit/patch", but imperative mood. See:
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

> 
> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
> ---
>  arch/arm/boot/dts/stm32mp131.dtsi | 34 +++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
> index 5949473cbbfd..7af3eb15c204 100644
> --- a/arch/arm/boot/dts/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/stm32mp131.dtsi
> @@ -1137,6 +1137,40 @@ mdma: dma-controller@58000000 {
>  			dma-requests = <48>;
>  		};
>  
> +		fmc: memory-controller@58002000 {
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			compatible = "st,stm32mp1-fmc2-ebi";
> +			reg = <0x58002000 0x1000>;


compatible is first, reg is second. ranges if present should be third.

> +			clocks = <&rcc FMC_K>;
> +			resets = <&rcc FMC_R>;
> +			status = "disabled";
> +
> +			ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */

Best regards,
Krzysztof
Christophe Kerello March 28, 2023, 4:12 p.m. UTC | #2 
Hello Krzysztof,

On 3/28/23 16:53, Krzysztof Kozlowski wrote:
> On 28/03/2023 14:26, Christophe Kerello wrote:
>> This patch adds the FMC support on STM32MP13x SoC family.
> 
> Do not use "This commit/patch", but imperative mood. See:
> https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
> 
>>
>> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
>> ---
>>   arch/arm/boot/dts/stm32mp131.dtsi | 34 +++++++++++++++++++++++++++++++
>>   1 file changed, 34 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
>> index 5949473cbbfd..7af3eb15c204 100644
>> --- a/arch/arm/boot/dts/stm32mp131.dtsi
>> +++ b/arch/arm/boot/dts/stm32mp131.dtsi
>> @@ -1137,6 +1137,40 @@ mdma: dma-controller@58000000 {
>>   			dma-requests = <48>;
>>   		};
>>   
>> +		fmc: memory-controller@58002000 {
>> +			#address-cells = <2>;
>> +			#size-cells = <1>;
>> +			compatible = "st,stm32mp1-fmc2-ebi";
>> +			reg = <0x58002000 0x1000>;
> 
> 
> compatible is first, reg is second. ranges if present should be third.
> 

Ok, it will be done in V2.

Regards,
Christophe Kerello.

>> +			clocks = <&rcc FMC_K>;
>> +			resets = <&rcc FMC_R>;
>> +			status = "disabled";
>> +
>> +			ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
> 
> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 5949473cbbfd..7af3eb15c204 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -1137,6 +1137,40 @@  mdma: dma-controller@58000000 {
 			dma-requests = <48>;
 		};
 
+		fmc: memory-controller@58002000 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			compatible = "st,stm32mp1-fmc2-ebi";
+			reg = <0x58002000 0x1000>;
+			clocks = <&rcc FMC_K>;
+			resets = <&rcc FMC_R>;
+			status = "disabled";
+
+			ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
+				 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
+				 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
+				 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
+				 <4 0 0x80000000 0x10000000>; /* NAND */
+
+			nand-controller@4,0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "st,stm32mp1-fmc2-nfc";
+				reg = <4 0x00000000 0x1000>,
+				      <4 0x08010000 0x1000>,
+				      <4 0x08020000 0x1000>,
+				      <4 0x01000000 0x1000>,
+				      <4 0x09010000 0x1000>,
+				      <4 0x09020000 0x1000>;
+				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>,
+				       <&mdma 24 0x2 0x12000a08 0x0 0x0>,
+				       <&mdma 25 0x2 0x12000a0a 0x0 0x0>;
+				dma-names = "tx", "rx", "ecc";
+				status = "disabled";
+			};
+		};
+
 		sdmmc1: mmc@58005000 {
 			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
 			arm,primecell-periphid = <0x20253180>;