diff mbox series

[v2,1/2] mtd: rawnand: stm32_fmc2: do not support EDO mode

Message ID 20230327094742.38856-2-christophe.kerello@foss.st.com
State New
Headers
Series mtd: rawnand: stm32_fmc2: do not support EDO mode |

Commit Message

Christophe Kerello March 27, 2023, 9:47 a.m. UTC 
  FMC2 controller does not support EDO mode (timings mode 4 and 5).

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")
---
 drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Tudor Ambarus March 27, 2023, 10:29 a.m. UTC | #1 
Hi,

On 3/27/23 10:47, Christophe Kerello wrote:
> FMC2 controller does not support EDO mode (timings mode 4 and 5).
> 

commit subject and message should be in imperative mood, so I would
change the commit subject to "mtd: rawnand: stm32_fmc2: Remove
unsupported EDO mode" and the message to something like "Remove the EDO
mode support from as the FMC2 controller does not support the feature."
Extra points if you describe what happened when you used timings mode 4
and 5 with the current version of the driver.

Miquel, could you add Cc to stable when applying?
Cc: stable@vger.kernel.org

> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>

> ---
>  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index 5d627048c420..3abb63d00a0b 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
>  	if (IS_ERR(sdrt))
>  		return PTR_ERR(sdrt);
>  
> +	if (sdrt->tRC_min < 30000)
> +		return -EOPNOTSUPP;
> +
>  	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
>  		return 0;
>
Miquel Raynal March 27, 2023, 10:40 a.m. UTC | #2 
Hi Tudor,

tudor.ambarus@linaro.org wrote on Mon, 27 Mar 2023 11:29:56 +0100:

> Hi,
> 
> On 3/27/23 10:47, Christophe Kerello wrote:
> > FMC2 controller does not support EDO mode (timings mode 4 and 5).
> >   
> 
> commit subject and message should be in imperative mood, so I would
> change the commit subject to "mtd: rawnand: stm32_fmc2: Remove
> unsupported EDO mode" and the message to something like "Remove the EDO
> mode support from as the FMC2 controller does not support the feature."
> Extra points if you describe what happened when you used timings mode 4
> and 5 with the current version of the driver.
> 
> Miquel, could you add Cc to stable when applying?
> Cc: stable@vger.kernel.org

Yes, absolutely.

> 
> > Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
> > Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")  
> 
> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> 
> > ---
> >  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> > index 5d627048c420..3abb63d00a0b 100644
> > --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> > +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> > @@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
> >  	if (IS_ERR(sdrt))
> >  		return PTR_ERR(sdrt);
> >  
> > +	if (sdrt->tRC_min < 30000)
> > +		return -EOPNOTSUPP;
> > +
> >  	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
> >  		return 0;
> >    


Thanks,
Miquèl
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 5d627048c420..3abb63d00a0b 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -1531,6 +1531,9 @@  static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
 	if (IS_ERR(sdrt))
 		return PTR_ERR(sdrt);
 
+	if (sdrt->tRC_min < 30000)
+		return -EOPNOTSUPP;
+
 	if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
 		return 0;