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From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
To: matthias.bgg@gmail.com
Cc: qii.wang@mediatek.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, jassisinghbrar@gmail.com,
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AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
Subject: [PATCH v1 02/18] arm64: dts: mediatek: mt6795: Add apmixedsys syscon
node
Date: Fri, 24 Mar 2023 18:54:40 +0100
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|
| Series |
MT6795 Helio X10 and Sony Xperia M5: DT step 2!
|
|
Commit Message
AngeloGioacchino Del Regno
March 24, 2023, 5:54 p.m. UTC
Add the APMIXEDSYS node, providing a syscon to the APMIXED iospace and
also providing PLLs.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 4d2119751572..26d640e1bfb6 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -310,6 +310,12 @@ systimer: timer@10200670 { clock-names = "clk13m"; }; + apmixedsys: syscon@10209000 { + compatible = "mediatek,mt6795-apmixedsys", "syscon"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + fhctl: clock-controller@10209f00 { compatible = "mediatek,mt6795-fhctl"; reg = <0 0x10209f00 0 0x100>;