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[2620:137:e000::1:20]) by mx.google.com with ESMTP id wf11-20020a170907d68b00b0092ffc08bcffsi20552308ejc.535.2023.03.24.05.14.40; Fri, 24 Mar 2023 05:15:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=gqITNorM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231773AbjCXMCd (ORCPT + 99 others); Fri, 24 Mar 2023 08:02:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231748AbjCXMCa (ORCPT ); Fri, 24 Mar 2023 08:02:30 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F2E923C68; Fri, 24 Mar 2023 05:02:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1679659349; x=1711195349; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6HPFNPQDz5pHaQknWW/YnEHrxyK/c9dkAaXEif8vAkY=; b=gqITNorM+C+pnjn4SwX5m1sFUFHtTtPw42toi+mIMcZtcPRZ2Q1BEyZd qlu1R3dlBKIxJWhaGt3I8TTazSRwhs4HKKforPWRQt4k/vsIHCEPvK28P NJ9IB4lq19RiirBJWdFG0iYh4eoQxpEE+fvCq728IWECY2r+fu4dJddqz PDbPBD15iLk5SR3A+r5g7kHxaxFJpEBzRkNFhcfa1nG1OU2bW/8H+FGG8 j/mAj3JMmGw2qLlYViGJrO0rUPpErisotfF8PQAq3X9gOuZPyqk7dV9QM I6xB5ktNLHly0n1TKmJCGIKEPA05TlNyrlXJHZ3h8D5xkLYgV02DuscjH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="323634149" X-IronPort-AV: E=Sophos;i="5.98,287,1673942400"; d="scan'208";a="323634149" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2023 05:02:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10658"; a="682674743" X-IronPort-AV: E=Sophos;i="5.98,287,1673942400"; d="scan'208";a="682674743" Received: from allen-box.sh.intel.com ([10.239.159.48]) by orsmga002.jf.intel.com with ESMTP; 24 Mar 2023 05:02:26 -0700 From: Lu Baolu To: iommu@lists.linux.dev, dmaengine@vger.kernel.org Cc: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Fenghua Yu , Dave Jiang , Vinod Koul , Jacob Pan , linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v3 2/6] iommu/vt-d: Allow SVA with device-specific IOPF Date: Fri, 24 Mar 2023 20:02:30 +0800 Message-Id: <20230324120234.313643-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230324120234.313643-1-baolu.lu@linux.intel.com> References: <20230324120234.313643-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.1 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761251291709953065?= X-GMAIL-MSGID: =?utf-8?q?1761251291709953065?= Currently enabling SVA requires IOPF support from the IOMMU and device PCI PRI. However, some devices can handle IOPF by itself without ever sending PCI page requests nor advertising PRI capability. Allow SVA support with IOPF handled either by IOMMU (PCI PRI) or device driver (device-specific IOPF). As long as IOPF could be handled, SVA should continue to work. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 7c2f4bd33582..caf664448ee9 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4650,7 +4650,21 @@ static int intel_iommu_enable_sva(struct device *dev) if (!(iommu->flags & VTD_FLAG_SVM_CAPABLE)) return -ENODEV; - if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled) + if (!info->pasid_enabled || !info->ats_enabled) + return -EINVAL; + + /* + * Devices having device-specific I/O fault handling should not + * support PCI/PRI. The IOMMU side has no means to check the + * capability of device-specific IOPF. Therefore, IOMMU can only + * default that if the device driver enables SVA on a non-PRI + * device, it will handle IOPF in its own way. + */ + if (!info->pri_supported) + return 0; + + /* Devices supporting PRI should have it enabled. */ + if (!info->pri_enabled) return -EINVAL; ret = iopf_queue_add_device(iommu->iopf_queue, dev);