diff mbox series

[3/3] perf/x86/zhaoxin: Add Yongfeng support

Message ID 20230323024026.823-4-silviazhao-oc@zhaoxin.com
State New
Headers
Series Add PMC support for Zhaoxin Yongfeng architecture |

Commit Message

silviazhao March 23, 2023, 2:40 a.m. UTC 
  Add support for Yongfeng which is Zhaoxin's successor microarchitecture
to Lujiazui.

Remove PERF_COUNT_HW_CACHE_REFERENCES and PERF_COUNT_HW_CACHE_MISSES
from global zx_pmon_event_map, since the cache hierarchy was changed
from Yongfeng, and these pmc event map changed too.

Add PERF_COUNT_HW_BRANCH_INSTRUCTIONS and PERF_COUNT_HW_BRANCH_MISSES
to global zx_pmon_event_map, since these two events will keep
consistent for Lujiazui and later.

Signed-off-by: silviazhao <silviazhao-oc@zhaoxin.com>
---
 arch/x86/events/zhaoxin/core.c | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/arch/x86/events/zhaoxin/core.c b/arch/x86/events/zhaoxin/core.c
index 34ccb214478c..634aa0c4a8c6 100644
--- a/arch/x86/events/zhaoxin/core.c
+++ b/arch/x86/events/zhaoxin/core.c
@@ -20,15 +20,15 @@ 
 #include "../perf_event.h"
 
 /*
- * Zhaoxin PerfMon, used on zxc and later.
+ * Zhaoxin PerfMon, used on Lujiazui and later.
  */
 static u64 zx_pmon_event_map[PERF_COUNT_HW_MAX] __read_mostly = {
 
 	[PERF_COUNT_HW_CPU_CYCLES]        = 0x0082,
 	[PERF_COUNT_HW_INSTRUCTIONS]      = 0x00c0,
-	[PERF_COUNT_HW_CACHE_REFERENCES]  = 0x0515,
-	[PERF_COUNT_HW_CACHE_MISSES]      = 0x051a,
 	[PERF_COUNT_HW_BUS_CYCLES]        = 0x0083,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0028,
+	[PERF_COUNT_HW_BRANCH_MISSES]	= 0x0029,
 };
 
 static struct event_constraint zxc_event_constraints[] __read_mostly = {
@@ -560,6 +560,8 @@  __init int zhaoxin_pmu_init(void)
 			zx_pmon_event_map[PERF_COUNT_HW_CACHE_REFERENCES] = 0;
 			zx_pmon_event_map[PERF_COUNT_HW_CACHE_MISSES] = 0;
 			zx_pmon_event_map[PERF_COUNT_HW_BUS_CYCLES] = 0;
+			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0;
+			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0;
 
 			pr_cont("ZXC events, ");
 			break;
@@ -580,6 +582,9 @@  __init int zhaoxin_pmu_init(void)
 
 			x86_pmu.event_constraints = wudaokou_event_constraints;
 
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_REFERENCES]  = 0x0515,
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_MISSES]      = 0x051a,
+
 			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0700;
 			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x0709;
 
@@ -591,11 +596,26 @@  __init int zhaoxin_pmu_init(void)
 
 			x86_pmu.event_constraints = wudaokou_event_constraints;
 
-			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x0028;
-			zx_pmon_event_map[PERF_COUNT_HW_BRANCH_MISSES] = 0x0029;
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_REFERENCES]  = 0x0515,
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_MISSES]      = 0x051a,
 
 			pr_cont("Lujiazui events, ");
 			break;
+		case ZHAOXIN_FAM7_YONGFENG:
+			zx_pmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =
+				X86_CONFIG(.event = 0x02, .umask = 0x01, .inv = 0x01,
+						.cmask = 0x01);
+
+			memcpy(hw_cache_event_ids, lujiazui_hw_cache_event_ids,
+					sizeof(hw_cache_event_ids));
+
+			x86_pmu.event_constraints = wudaokou_event_constraints;
+
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_REFERENCES]  = 0x051a;
+			zx_pmon_event_map[PERF_COUNT_HW_CACHE_MISSES]      = 0;
+
+			pr_cont("Yongfeng events, ");
+			break;
 		default:
 			return -ENODEV;
 		}