[v1,1/2] dt-bindings: reset: mt8188: Add reset control for DSI0

Message ID 20230322032202.12598-2-shawn.sung@mediatek.com
State New
Headers
Series Add reset control for DSI0 |

Commit Message

Shawn Sung (宋孝謙) March 22, 2023, 3:22 a.m. UTC
  Add reset control for DSI0.

Signed-off-by: Shawn Sung <shawn.sung@mediatek.com>
---
 include/dt-bindings/reset/mt8188-resets.h | 3 +++
 1 file changed, 3 insertions(+)

--
2.18.0
  

Comments

Krzysztof Kozlowski March 22, 2023, 8:34 a.m. UTC | #1
On 22/03/2023 04:22, Shawn Sung wrote:
> Add reset control for DSI0.
> 
> Signed-off-by: Shawn Sung <shawn.sung@mediatek.com>
> ---
>  include/dt-bindings/reset/mt8188-resets.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
> index 377cdfda82a9..5c9e74130ef0 100644
> --- a/include/dt-bindings/reset/mt8188-resets.h
> +++ b/include/dt-bindings/reset/mt8188-resets.h
> @@ -33,4 +33,7 @@
> 
>  #define MT8188_TOPRGU_SW_RST_NUM               24
> 
> +/* VDOSYS0 */
> +#define MT8188_VDO0_RST_DSI0                   21

Why this is not 0? IDs start from 0.

Best regards,
Krzysztof
  
AngeloGioacchino Del Regno March 22, 2023, 9:27 a.m. UTC | #2
Il 22/03/23 09:34, Krzysztof Kozlowski ha scritto:
> On 22/03/2023 04:22, Shawn Sung wrote:
>> Add reset control for DSI0.
>>
>> Signed-off-by: Shawn Sung <shawn.sung@mediatek.com>
>> ---
>>   include/dt-bindings/reset/mt8188-resets.h | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
>> index 377cdfda82a9..5c9e74130ef0 100644
>> --- a/include/dt-bindings/reset/mt8188-resets.h
>> +++ b/include/dt-bindings/reset/mt8188-resets.h
>> @@ -33,4 +33,7 @@
>>
>>   #define MT8188_TOPRGU_SW_RST_NUM               24
>>
>> +/* VDOSYS0 */
>> +#define MT8188_VDO0_RST_DSI0                   21
> 
> Why this is not 0? IDs start from 0.
> 

Because mtk-mmsys needs to be fixed, bindings IDs are *again* 1:1 with HW bits,
there's no mapping like the one that was "recently" done in clk/mediatek resets.

Since VDO0/1 have got lots of holes in reset bit mapping, it's definitely time
to fix this situation now.....

Shawn, please fix.
For your reference, look at [1] and [2].

[1]: https://lore.kernel.org/all/20220523060056.24396-9-rex-bc.chen@mediatek.com/
[2]: https://lore.kernel.org/all/20220523060056.24396-15-rex-bc.chen@mediatek.com/

Regards,
Angelo


>
  

Patch

diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
index 377cdfda82a9..5c9e74130ef0 100644
--- a/include/dt-bindings/reset/mt8188-resets.h
+++ b/include/dt-bindings/reset/mt8188-resets.h
@@ -33,4 +33,7 @@ 

 #define MT8188_TOPRGU_SW_RST_NUM               24

+/* VDOSYS0 */
+#define MT8188_VDO0_RST_DSI0                   21
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8188 */