[1/2] arm64: dts: ti: k3-j784s4-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain
Message ID | 20230316104743.482972-2-sabiya.d@ti.com |
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State | New |
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Thu, 16 Mar 2023 03:47:59 -0700 (PDT) Received: from localhost.localdomain ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id f26-20020aa78b1a000000b005a8c92f7c27sm5108744pfd.212.2023.03.16.03.47.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 03:47:58 -0700 (PDT) From: sabiya.d@mistralsolutions.com X-Google-Original-From: sabiya.d@ti.com To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linus.walleij@linaro.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, sabiya.d@mistralsolutions.com, Dasnavis Sabiya <sabiya.d@ti.com> Subject: [PATCH 1/2] arm64: dts: ti: k3-j784s4-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain Date: Thu, 16 Mar 2023 16:17:42 +0530 Message-Id: <20230316104743.482972-2-sabiya.d@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230316104743.482972-1-sabiya.d@ti.com> References: <20230316104743.482972-1-sabiya.d@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BESS-ID: 1678967538-310366-5549-16789-1 X-BESS-VER: 2019.1_20230310.1716 X-BESS-Apparent-Source-IP: 209.85.128.197 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUirNy1bSUcovVrIyNDA2BrIygIKGSYYmqWZGho kppqkmxklplonJRompJmapZslmBmlJSUq1sQDHxzw1QQAAAA== X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.246833 [from cloudscan9-71.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.00 NO_REAL_NAME HEADER: From: does not include a real name X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_BESS_OUTBOUND, NO_REAL_NAME X-BESS-BRTS-Status: 1 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760526983535591739?= X-GMAIL-MSGID: =?utf-8?q?1760526983535591739?= |
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Fix WKUP domain IO PADCONFIG size issue and RPi header support
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Commit Message
Dasnavis Sabiya
March 16, 2023, 10:47 a.m. UTC
From: Dasnavis Sabiya <sabiya.d@ti.com> The size of IO PADCONFIG register set of the wakeup domain is incorrect for J784S4. Update the PADCONFIG offset size to the correct value for J784S4 SoC. Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> --- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
Hi Sabiya, On 16/03/23 16:17, sabiya.d@mistralsolutions.com wrote: > From: Dasnavis Sabiya <sabiya.d@ti.com> > > The size of IO PADCONFIG register set of the wakeup domain is incorrect for > J784S4. Update the PADCONFIG offset size to the correct value for > J784S4 SoC. > > Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") > Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > index 64bd3dee14aa..c0103513c64c 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > @@ -50,7 +50,7 @@ mcu_ram: sram@41c00000 { > wkup_pmx0: pinctrl@4301c000 { > compatible = "pinctrl-single"; > /* Proxy 0 addressing */ > - reg = <0x00 0x4301c000 0x00 0x178>; > + reg = <0x00 0x4301c000 0x00 0x194>; > #pinctrl-cells = <1>; > pinctrl-single,register-width = <32>; > pinctrl-single,function-mask = <0xffffffff>; Similar feedback as for the J721S2 PADCONFIG patch, see the discussion below, https://lore.kernel.org/all/20230328114742.tnaa5hi3qm3rsgld@ecology/ As suggested by Nishanth, let us do a single fixup to avoid non-addressable regions and fix the padconfig region size. From datasheet I can see that the addresses corresponding to WKUP_PADCONFIG13, WKUP_PADCONFIG25 are missing for J784S4.
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 64bd3dee14aa..c0103513c64c 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -50,7 +50,7 @@ mcu_ram: sram@41c00000 { wkup_pmx0: pinctrl@4301c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */ - reg = <0x00 0x4301c000 0x00 0x178>; + reg = <0x00 0x4301c000 0x00 0x194>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>;