@@ -222,7 +222,7 @@ config MOXA_INTELLIO
config MOXA_SMARTIO
tristate "Moxa SmartIO support v. 2.0"
- depends on SERIAL_NONSTANDARD && PCI
+ depends on SERIAL_NONSTANDARD && PCI && HAS_IOPORT
help
Say Y here if you have a Moxa SmartIO multiport serial card and/or
want to help develop a new version of this driver.
@@ -48,8 +48,10 @@ static unsigned int serial8250_early_in(struct uart_port *port, int offset)
return readl(port->membase + offset);
case UPIO_MEM32BE:
return ioread32be(port->membase + offset);
+#ifdef CONFIG_HAS_IOPORT
case UPIO_PORT:
return inb(port->iobase + offset);
+#endif
case UPIO_AU:
return port->serial_in(port, reg_offset);
default:
@@ -75,9 +77,11 @@ static void serial8250_early_out(struct uart_port *port, int offset, int value)
case UPIO_MEM32BE:
iowrite32be(value, port->membase + offset);
break;
+#ifdef CONFIG_HAS_IOPORT
case UPIO_PORT:
outb(value, port->iobase + offset);
break;
+#endif
case UPIO_AU:
port->serial_out(port, reg_offset, value);
break;
@@ -847,6 +847,7 @@ static int pci_netmos_init(struct pci_dev *dev)
return num_serial;
}
+#ifdef CONFIG_HAS_IOPORT
/*
* These chips are available with optionally one parallel port and up to
* two serial ports. Unfortunately they all have the same product id.
@@ -973,6 +974,7 @@ static void pci_ite887x_exit(struct pci_dev *dev)
ioport &= 0xffff;
release_region(ioport, ITE_887x_IOSIZE);
}
+#endif /* CONFIG_HAS_IOPORT */
/*
* Oxford Semiconductor Inc.
@@ -1255,6 +1257,7 @@ static int pci_asix_setup(struct serial_private *priv,
#define QOPR_CLOCK_X8 0x0003
#define QOPR_CLOCK_RATE_MASK 0x0003
+#ifdef CONFIG_HAS_IOPORT
/* Quatech devices have their own extra interface features */
static struct pci_device_id quatech_cards[] = {
{ PCI_DEVICE_DATA(QUATECH, QSC100, 1) },
@@ -1474,6 +1477,7 @@ static int pci_quatech_setup(struct serial_private *priv,
pci_warn(priv->dev, "software control of RS422 features not currently supported.\n");
return pci_default_setup(priv, board, port, idx);
}
+#endif /* CONFIG_HAS_IOPORT */
static int pci_default_setup(struct serial_private *priv,
const struct pciserial_board *board,
@@ -1753,6 +1757,7 @@ static int skip_tx_en_setup(struct serial_private *priv,
return pci_default_setup(priv, board, port, idx);
}
+#ifdef CONFIG_HAS_IOPORT
static void kt_handle_break(struct uart_port *p)
{
struct uart_8250_port *up = up_to_u8250p(p);
@@ -1796,6 +1801,7 @@ static int kt_serial_setup(struct serial_private *priv,
port->port.handle_break = kt_handle_break;
return skip_tx_en_setup(priv, board, port, idx);
}
+#endif /* CONFIG_HAS_IOPORT */
static int pci_eg20t_init(struct pci_dev *dev)
{
@@ -1840,6 +1846,7 @@ pci_wch_ch38x_setup(struct serial_private *priv,
#define CH384_XINT_ENABLE_REG 0xEB
#define CH384_XINT_ENABLE_BIT 0x02
+#ifdef CONFIG_HAS_IOPORT
static int pci_wch_ch38x_init(struct pci_dev *dev)
{
int max_port;
@@ -1867,6 +1874,7 @@ static void pci_wch_ch38x_exit(struct pci_dev *dev)
iobase = pci_resource_start(dev, 0);
outb(0x0, iobase + CH384_XINT_ENABLE_REG);
}
+#endif /* CONFIG_HAS_IOPORT */
static int
@@ -2070,6 +2078,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.subdevice = PCI_ANY_ID,
.setup = ce4100_serial_setup,
},
+#ifdef CONFIG_HAS_IOPORT
{
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_PATSBURG_KT,
@@ -2089,6 +2098,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.setup = pci_default_setup,
.exit = pci_ite887x_exit,
},
+#endif
/*
* National Instruments
*/
@@ -2210,6 +2220,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.exit = pci_ni8430_exit,
},
/* Quatech */
+#ifdef CONFIG_HAS_IOPORT
{
.vendor = PCI_VENDOR_ID_QUATECH,
.device = PCI_ANY_ID,
@@ -2218,6 +2229,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.init = pci_quatech_init,
.setup = pci_quatech_setup,
},
+#endif
/*
* Panacom
*/
@@ -2588,6 +2600,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.subdevice = PCI_ANY_ID,
.setup = pci_wch_ch38x_setup,
},
+#ifdef CONFIG_HAS_IOPORT
/* WCH CH384 8S card (16850 clone) */
{
.vendor = PCIE_VENDOR_ID_WCH,
@@ -2598,6 +2611,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.exit = pci_wch_ch38x_exit,
.setup = pci_wch_ch38x_setup,
},
+#endif
/*
* ASIX devices with FIFO bug
*/
@@ -400,6 +400,7 @@ static void au_serial_dl_write(struct uart_8250_port *up, int value)
#endif
+#ifdef CONFIG_HAS_IOPORT
static unsigned int hub6_serial_in(struct uart_port *p, int offset)
{
offset = offset << p->regshift;
@@ -413,6 +414,7 @@ static void hub6_serial_out(struct uart_port *p, int offset, int value)
outb(p->hub6 - 1 + offset, p->iobase);
outb(value, p->iobase + 1);
}
+#endif /* CONFIG_HAS_IOPORT */
static unsigned int mem_serial_in(struct uart_port *p, int offset)
{
@@ -462,6 +464,7 @@ static unsigned int mem32be_serial_in(struct uart_port *p, int offset)
return ioread32be(p->membase + offset);
}
+#ifdef CONFIG_HAS_IOPORT
static unsigned int io_serial_in(struct uart_port *p, int offset)
{
offset = offset << p->regshift;
@@ -473,6 +476,24 @@ static void io_serial_out(struct uart_port *p, int offset, int value)
offset = offset << p->regshift;
outb(value, p->iobase + offset);
}
+#endif
+static unsigned int no_serial_in(struct uart_port *p, int offset)
+{
+ return (unsigned int)-1;
+}
+
+static void no_serial_out(struct uart_port *p, int offset, int value)
+{
+}
+
+#ifdef CONFIG_HAS_IOPORT
+static inline bool is_upf_fourport(struct uart_port *port)
+{
+ return port->flags & UPF_FOURPORT;
+}
+#else
+#define is_upf_fourport(x) false
+#endif
static int serial8250_default_handle_irq(struct uart_port *port);
@@ -484,10 +505,12 @@ static void set_io_from_upio(struct uart_port *p)
up->dl_write = default_serial_dl_write;
switch (p->iotype) {
+#ifdef CONFIG_HAS_IOPORT
case UPIO_HUB6:
p->serial_in = hub6_serial_in;
p->serial_out = hub6_serial_out;
break;
+#endif
case UPIO_MEM:
p->serial_in = mem_serial_in;
@@ -518,10 +541,17 @@ static void set_io_from_upio(struct uart_port *p)
break;
#endif
- default:
+#ifdef CONFIG_HAS_IOPORT
+ case UPIO_PORT:
p->serial_in = io_serial_in;
p->serial_out = io_serial_out;
break;
+#endif
+
+ default:
+ WARN(1, "Unsupported UART type %x\n", p->iotype);
+ p->serial_in = no_serial_in;
+ p->serial_out = no_serial_out;
}
/* Remember loaded iotype */
up->cur_iotype = p->iotype;
@@ -1378,7 +1408,7 @@ static void autoconfig_irq(struct uart_8250_port *up)
unsigned long irqs;
int irq;
- if (port->flags & UPF_FOURPORT) {
+ if (is_upf_fourport(port)) {
ICP = (port->iobase & 0xfe0) | 0x1f;
save_ICP = inb_p(ICP);
outb_p(0x80, ICP);
@@ -1397,7 +1427,7 @@ static void autoconfig_irq(struct uart_8250_port *up)
irqs = probe_irq_on();
serial8250_out_MCR(up, 0);
udelay(10);
- if (port->flags & UPF_FOURPORT) {
+ if (is_upf_fourport(port)) {
serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
} else {
serial8250_out_MCR(up,
@@ -1415,7 +1445,7 @@ static void autoconfig_irq(struct uart_8250_port *up)
serial8250_out_MCR(up, save_mcr);
serial_out(up, UART_IER, save_ier);
- if (port->flags & UPF_FOURPORT)
+ if (is_upf_fourport(port))
outb_p(save_ICP, ICP);
if (uart_console(port))
@@ -2365,7 +2395,7 @@ int serial8250_do_startup(struct uart_port *port)
serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
spin_lock_irqsave(&port->lock, flags);
- if (up->port.flags & UPF_FOURPORT) {
+ if (is_upf_fourport(&up->port)) {
if (!up->port.irq)
up->port.mctrl |= TIOCM_OUT1;
} else
@@ -2447,7 +2477,7 @@ int serial8250_do_startup(struct uart_port *port)
*/
up->ier = UART_IER_RLSI | UART_IER_RDI;
- if (port->flags & UPF_FOURPORT) {
+ if (is_upf_fourport(port)) {
unsigned int icp;
/*
* Enable interrupts on the AST Fourport board
@@ -2490,7 +2520,7 @@ void serial8250_do_shutdown(struct uart_port *port)
serial8250_release_dma(up);
spin_lock_irqsave(&port->lock, flags);
- if (port->flags & UPF_FOURPORT) {
+ if (is_upf_fourport(port)) {
/* reset interrupts on the AST Fourport board */
inb((port->iobase & 0xfe0) | 0x1f);
port->mctrl |= TIOCM_OUT1;
@@ -6,7 +6,6 @@
config SERIAL_8250
tristate "8250/16550 and compatible serial support"
- depends on !S390
select SERIAL_CORE
select SERIAL_MCTRL_GPIO if GPIOLIB
help
@@ -72,7 +71,7 @@ config SERIAL_8250_16550A_VARIANTS
config SERIAL_8250_FINTEK
bool "Support for Fintek F81216A LPC to 4 UART RS485 API"
- depends on SERIAL_8250
+ depends on SERIAL_8250 && HAS_IOPORT
help
Selecting this option will add support for the RS485 capabilities
of the Fintek F81216A LPC to 4 UART.
@@ -160,7 +159,7 @@ config SERIAL_8250_HP300
config SERIAL_8250_CS
tristate "8250/16550 PCMCIA device support"
- depends on PCMCIA && SERIAL_8250
+ depends on PCMCIA && SERIAL_8250 && HAS_IOPORT
help
Say Y here to enable support for 16-bit PCMCIA serial devices,
including serial port cards, modems, and the modem functions of
@@ -878,7 +878,7 @@ config SERIAL_TXX9_STDSERIAL
config SERIAL_JSM
tristate "Digi International NEO and Classic PCI Support"
- depends on PCI
+ depends on PCI && HAS_IOPORT
select SERIAL_CORE
help
This is a driver for Digi International's Neo and Classic series