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From: Philippe Schenker <dev@pschenker.ch>
To: devicetree@vger.kernel.org, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>
Cc: NXP Linux Team <linux-imx@nxp.com>,
Frank Rowand <frowand.list@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Fabio Estevam <festevam@gmail.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org,
Philippe Schenker <philippe.schenker@toradex.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 05/23] arm64: dts: colibri-imx8x: Add pinctrl group for
csi_mclk
Date: Tue, 14 Mar 2023 11:23:51 +0100
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|
| Series |
Update Colibri iMX8X Devicetrees
|
|
Commit Message
Philippe Schenker
March 14, 2023, 10:23 a.m. UTC
From: Philippe Schenker <philippe.schenker@toradex.com> Add missing pinctrl groups that can be used to enable the correct muxing if csi_mclk is needed on SODIMM 75. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> --- (no changes since v1) arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi index 5019439a3a75..a352246aa1f3 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -159,6 +159,10 @@ pinctrl_csi_ctl: csictlgrp { <IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20>; /* SODIMM 89 */ }; + pinctrl_csi_mclk: csimclkgrp { + fsl,pins = <IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041>; /* SODIMM 75 / X3-12 */ + }; + pinctrl_ext_io0: extio0grp { fsl,pins = <IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040>; /* SODIMM 135 */ };