diff mbox series

[v6,5/5] dmaengine: dw-edma: Optimization in dw_edma_v0_core_handle_int

Message ID 20230310032342.17395-6-cai.huoqing@linux.dev
State New
Headers
Series dmaengine: dw-edma: Add support for native HDMA |

Commit Message

Cai Huoqing March 10, 2023, 3:23 a.m. UTC 
  Optimization in dw_edma_v0_core_handle_int, remove some
unnecessary wrapper function.

Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev>
---
v5->v6:
  11.Remove some unnecessary wrapper function.

 drivers/dma/dw-edma/dw-edma-v0-core.c | 38 +++++----------------------
 1 file changed, 6 insertions(+), 32 deletions(-)
diff mbox series

Patch

diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 09c9cec652e1..097385e3e688 100644
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -258,34 +258,6 @@  static enum dma_status dw_edma_v0_core_ch_status(struct dw_edma_chan *chan)
 		return DMA_ERROR;
 }
 
-static void dw_edma_v0_core_clear_done_int(struct dw_edma_chan *chan)
-{
-	struct dw_edma *dw = chan->dw;
-
-	SET_RW_32(dw, chan->dir, int_clear,
-		  FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id)));
-}
-
-static void dw_edma_v0_core_clear_abort_int(struct dw_edma_chan *chan)
-{
-	struct dw_edma *dw = chan->dw;
-
-	SET_RW_32(dw, chan->dir, int_clear,
-		  FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id)));
-}
-
-static u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir)
-{
-	return FIELD_GET(EDMA_V0_DONE_INT_MASK,
-			 GET_RW_32(dw, dir, int_status));
-}
-
-static u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)
-{
-	return FIELD_GET(EDMA_V0_ABORT_INT_MASK,
-			 GET_RW_32(dw, dir, int_status));
-}
-
 static
 irqreturn_t dw_edma_v0_core_handle_int(struct dw_edma_irq *dw_irq, enum dw_edma_dir dir,
 				       dw_edma_handler_t done, dw_edma_handler_t abort)
@@ -307,23 +279,25 @@  irqreturn_t dw_edma_v0_core_handle_int(struct dw_edma_irq *dw_irq, enum dw_edma_
 		mask = dw_irq->rd_mask;
 	}
 
-	val = dw_edma_v0_core_status_done_int(dw, dir);
+	val = FIELD_GET(EDMA_V0_DONE_INT_MASK, GET_RW_32(dw, dir, int_status));
 	val &= mask;
 	for_each_set_bit(pos, &val, total) {
 		chan = &dw->chan[pos + off];
 
-		dw_edma_v0_core_clear_done_int(chan);
+		SET_RW_32(dw, chan->dir, int_clear,
+			  FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id)));
 		done(chan);
 
 		ret = IRQ_HANDLED;
 	}
 
-	val = dw_edma_v0_core_status_abort_int(dw, dir);
+	val = FIELD_GET(EDMA_V0_ABORT_INT_MASK, GET_RW_32(dw, dir, int_status));
 	val &= mask;
 	for_each_set_bit(pos, &val, total) {
 		chan = &dw->chan[pos + off];
 
-		dw_edma_v0_core_clear_abort_int(chan);
+		SET_RW_32(dw, chan->dir, int_clear,
+			  FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id)));
 		abort(chan);
 
 		ret = IRQ_HANDLED;