Message ID | 20230309103752.173541-5-brgl@bgdev.pl |
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State | New |
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arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs
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Commit Message
Bartosz Golaszewski
March 9, 2023, 10:37 a.m. UTC
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> This enables the I2C interface on the sa8775p-ride development board. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts index a538bb79c04a..5fdce8279537 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8775p-ride.dts @@ -13,6 +13,7 @@ / { aliases { serial0 = &uart10; + i2c18 = &i2c18; }; chosen { @@ -20,6 +21,13 @@ chosen { }; }; +&i2c18 { + clock-frequency = <400000>; + pinctrl-0 = <&qup_i2c18_default>; + pinctrl-names = "default"; + status = "okay"; +}; + &qupv3_id_1 { status = "okay"; }; @@ -37,6 +45,13 @@ qup_uart10_default: qup-uart10-state { pins = "gpio46", "gpio47"; function = "qup1_se3"; }; + + qup_i2c18_default: qup-i2c18-state { + pins = "gpio95", "gpio96"; + function = "qup2_se4"; + drive-strength = <2>; + bias-pull-up; + }; }; &uart10 {