[v1,07/25] arm64: dts: colibri-imx8x: Split pinctrl_hog1

Message ID 20230308125300.58244-8-dev@pschenker.ch
State New
Headers
Series Update Colibri iMX8X Devicetrees |

Commit Message

Philippe Schenker March 8, 2023, 12:52 p.m. UTC
  From: Philippe Schenker <philippe.schenker@toradex.com>

Split pinctrl_hog1 into a second group so CSI_MCLK can be muxed to a
gpio on its own.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---

 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index e1b907b7a85d..432449359625 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -119,7 +119,8 @@  &usdhc2 {
 
 &iomuxc {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
+	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
+		    <&pinctrl_hog2>;
 
 	/* On-module touch pen-down interrupt */
 	pinctrl_ad7879_int: ad7879intgrp {
@@ -253,6 +254,10 @@  pinctrl_hog1: hog1grp {
 			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
 	};
 
+	pinctrl_hog2: hog2grp {
+		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>;		/* SODIMM  75 */
+	};
+
 	/*
 	 * This pin is used in the SCFW as a UART. Using it from
 	 * Linux would require rewritting the SCFW board file.