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Tue, 7 Mar 2023 14:47:09 -0800 (PST) Received: from gsql.ggedos.sk (off-20.infotel.telecom.sk [212.5.213.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by hosting.gsystem.sk (Postfix) with ESMTPSA id E31577A0779; Tue, 7 Mar 2023 23:46:50 +0100 (CET) From: Ondrej Zary To: Damien Le Moal , Sudip Mukherjee Cc: Christoph Hellwig , Sergey Shtylyov , Jens Axboe , Tim Waugh , linux-block@vger.kernel.org, linux-parport@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 30/32] pata_parport-bpck6: move defines and mode_map to bpck6.c Date: Tue, 7 Mar 2023 23:46:25 +0100 Message-Id: <20230307224627.28011-31-linux@zary.sk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230307224627.28011-1-linux@zary.sk> References: <20230307224627.28011-1-linux@zary.sk> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759751192874790454?= X-GMAIL-MSGID: =?utf-8?q?1759751192874790454?= Move all register definitions and mode_map to bpck6.c Signed-off-by: Ondrej Zary --- drivers/ata/pata_parport/bpck6.c | 44 ++++++++++++++++++++++++ drivers/ata/pata_parport/ppc6lnx.c | 54 ------------------------------ 2 files changed, 44 insertions(+), 54 deletions(-) diff --git a/drivers/ata/pata_parport/bpck6.c b/drivers/ata/pata_parport/bpck6.c index f6d0916577b3..0ed6a97ab04f 100644 --- a/drivers/ata/pata_parport/bpck6.c +++ b/drivers/ata/pata_parport/bpck6.c @@ -19,6 +19,50 @@ #include "pata_parport.h" #include "ppc6lnx.c" +/* 60772 Commands */ +#define ACCESS_REG 0x00 +#define ACCESS_PORT 0x40 + +#define ACCESS_READ 0x00 +#define ACCESS_WRITE 0x20 + +/* 60772 Command Prefix */ +#define CMD_PREFIX_SET 0xe0 // Special command that modifies next command's operation +#define CMD_PREFIX_RESET 0xc0 // Resets current cmd modifier reg bits + #define PREFIX_IO16 0x01 // perform 16-bit wide I/O + #define PREFIX_FASTWR 0x04 // enable PPC mode fast-write + #define PREFIX_BLK 0x08 // enable block transfer mode + +/* 60772 Registers */ +#define REG_STATUS 0x00 // status register + #define STATUS_IRQA 0x01 // Peripheral IRQA line + #define STATUS_EEPROM_DO 0x40 // Serial EEPROM data bit +#define REG_VERSION 0x01 // PPC version register (read) +#define REG_HWCFG 0x02 // Hardware Config register +#define REG_RAMSIZE 0x03 // Size of RAM Buffer + #define RAMSIZE_128K 0x02 +#define REG_EEPROM 0x06 // EEPROM control register + #define EEPROM_SK 0x01 // eeprom SK bit + #define EEPROM_DI 0x02 // eeprom DI bit + #define EEPROM_CS 0x04 // eeprom CS bit + #define EEPROM_EN 0x08 // eeprom output enable +#define REG_BLKSIZE 0x08 // Block transfer len (24 bit) + +/* flags */ +#define fifo_wait 0x10 + +/* DONT CHANGE THESE LEST YOU BREAK EVERYTHING - BIT FIELD DEPENDENCIES */ +#define PPCMODE_UNI_SW 0 +#define PPCMODE_UNI_FW 1 +#define PPCMODE_BI_SW 2 +#define PPCMODE_BI_FW 3 +#define PPCMODE_EPP_BYTE 4 +#define PPCMODE_EPP_WORD 5 +#define PPCMODE_EPP_DWORD 6 + +int mode_map[] = { PPCMODE_UNI_FW, PPCMODE_BI_FW, PPCMODE_EPP_BYTE, + PPCMODE_EPP_WORD, PPCMODE_EPP_DWORD }; + static void bpck6_send_cmd(struct pi_adapter *pi, u8 cmd) { switch (mode_map[pi->mode]) { diff --git a/drivers/ata/pata_parport/ppc6lnx.c b/drivers/ata/pata_parport/ppc6lnx.c index 9a763cbda130..e72b1842adda 100644 --- a/drivers/ata/pata_parport/ppc6lnx.c +++ b/drivers/ata/pata_parport/ppc6lnx.c @@ -15,57 +15,3 @@ //*************************************************************************** -// 60772 Commands - -#define ACCESS_REG 0x00 -#define ACCESS_PORT 0x40 - -#define ACCESS_READ 0x00 -#define ACCESS_WRITE 0x20 - -// 60772 Command Prefix - -#define CMD_PREFIX_SET 0xe0 // Special command that modifies the next command's operation -#define CMD_PREFIX_RESET 0xc0 // Resets current cmd modifier reg bits - #define PREFIX_IO16 0x01 // perform 16-bit wide I/O - #define PREFIX_FASTWR 0x04 // enable PPC mode fast-write - #define PREFIX_BLK 0x08 // enable block transfer mode - -// 60772 Registers - -#define REG_STATUS 0x00 // status register - #define STATUS_IRQA 0x01 // Peripheral IRQA line - #define STATUS_EEPROM_DO 0x40 // Serial EEPROM data bit -#define REG_VERSION 0x01 // PPC version register (read) -#define REG_HWCFG 0x02 // Hardware Config register -#define REG_RAMSIZE 0x03 // Size of RAM Buffer - #define RAMSIZE_128K 0x02 -#define REG_EEPROM 0x06 // EEPROM control register - #define EEPROM_SK 0x01 // eeprom SK bit - #define EEPROM_DI 0x02 // eeprom DI bit - #define EEPROM_CS 0x04 // eeprom CS bit - #define EEPROM_EN 0x08 // eeprom output enable -#define REG_BLKSIZE 0x08 // Block transfer len (24 bit) - -//*************************************************************************** - -// ppc_flags - -#define fifo_wait 0x10 - -//*************************************************************************** - -// DONT CHANGE THESE LEST YOU BREAK EVERYTHING - BIT FIELD DEPENDENCIES - -#define PPCMODE_UNI_SW 0 -#define PPCMODE_UNI_FW 1 -#define PPCMODE_BI_SW 2 -#define PPCMODE_BI_FW 3 -#define PPCMODE_EPP_BYTE 4 -#define PPCMODE_EPP_WORD 5 -#define PPCMODE_EPP_DWORD 6 - -//*************************************************************************** - -int mode_map[] = { PPCMODE_UNI_FW, PPCMODE_BI_FW, PPCMODE_EPP_BYTE, - PPCMODE_EPP_WORD, PPCMODE_EPP_DWORD };