From patchwork Tue Mar 7 02:39:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 65239 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2215907wrd; Mon, 6 Mar 2023 19:25:35 -0800 (PST) X-Google-Smtp-Source: AK7set+AhFn7YXvhbMLlK168MaP7REbJafxvNr1ZseapCap77o+ACQp2ubdGD2yX/5io7VSM2jVU X-Received: by 2002:a05:6a20:bfd6:b0:d0:455f:4232 with SMTP id gs22-20020a056a20bfd600b000d0455f4232mr166262pzb.12.1678159535076; Mon, 06 Mar 2023 19:25:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678159535; cv=none; d=google.com; s=arc-20160816; b=sNRrofHNoPk9nFYE4YvaVZr0dziog9r2YN0dBbDPNcsh/Y3ic4Q4EVf+fd23k3prf0 mYtIO2LfrfJLt65QZKGy3iiJTpd9Qxk9HOaRxujQsP/R4gIMJ23dvs7MhY8g4kS0Yy6S viBfyIo3Kcr9iUAOmhV86r+uvyb9oyDt1TidGV4eirYHC3+yjamwnIF7whFfRmzqBNK4 A2HYQxTl4Z66ftDaORXMj9IssxvVG8RiPJ7X6TxYd50qK0oZY07EtOmPHBZdkeAnEjkZ gOuBccJ7yTUcxzS8Yi8lGDyCj6QBjyD7mBQ6YPmn8wonEMEc4jvEx+QDbr3wOtUk4fd6 Mn3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5faTauMQSF6A1INgRvw37EaNuyfpbr4ubN9CGI+xwAg=; b=SEcKhy8oIw5Z8djc2PrSrL0YhfDtHSTmF1Uljhc0vuzhIJyDHhJCm81+dsgNpJhMXF V5MvfM+WAT5JryWc+A4b3uVEwxGg0/jCugGEP1J9HBcJHutXqRLvIKi5gkN3mDDspwJF Hg+1ChFuj5PoQj/S6LInfDNj+BwlhtfbMQO66WMGKYHsXOFUBajLgqZjEKTmgMokmqHU 2DFNOsrZQ1398BI8ERezqaV2gcloyqrvl1H/en5DVeI6BvY2XL4J9KhJy5ex8jwsrEpG exibkBEbhGX+bOomK9fyHak4QzpuZX84wp9WBH6ivSsoJv9apnEafzjvrpo8LHjfVPyY X5fw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=YSsLUOQx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o8-20020a63e348000000b00502fd2d2901si10163408pgj.343.2023.03.06.19.25.22; Mon, 06 Mar 2023 19:25:35 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=YSsLUOQx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230464AbjCGDG4 (ORCPT + 99 others); Mon, 6 Mar 2023 22:06:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230351AbjCGDGB (ORCPT ); Mon, 6 Mar 2023 22:06:01 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BF4379B27; Mon, 6 Mar 2023 19:05:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678158331; x=1709694331; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4MOmv1ssbPQB1T3aYHisX8wUlNtj7mFGaUC5mOSwjmE=; b=YSsLUOQxFsr7MfksmpNinoH+ZP1p83O3mCKradgU6ACmBIitXr5ugVeW 9Nhsa6AjT6ROxUvKdAUeIPP1VNuLQ9aO7HTIxs6/ISublzTmncAPysyNR N3ovsmtSP8VJz+XdM96PfuaQ56i8xYlIOULd0q/dXTKHrbPedwEM09eKS NzF3xdvsflfmj5dJmguOOVHfT0iab9SGXFZjUE0X2bEODmLhFm6amj8Wj 68rFyaUV3NdJem/MHcoMlU7JBhEsK48BRaG+vRA7SMRGrw/SLR51O0prB DOyZ+IWMaPyPeqCN3JFEP+mdkbXkc0CmQN0nNOHtPVlGm0qpmusob+gIX A==; X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="338072477" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="338072477" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2023 19:05:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="676409836" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="676409836" Received: from unknown (HELO fred..) ([172.25.112.68]) by orsmga002.jf.intel.com with ESMTP; 06 Mar 2023 19:05:17 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, andrew.cooper3@citrix.com, seanjc@google.com, pbonzini@redhat.com, ravi.v.shankar@intel.com Subject: [PATCH v5 18/34] x86/fred: add a debug fault entry stub for FRED Date: Mon, 6 Mar 2023 18:39:30 -0800 Message-Id: <20230307023946.14516-19-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230307023946.14516-1-xin3.li@intel.com> References: <20230307023946.14516-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759677812579256161?= X-GMAIL-MSGID: =?utf-8?q?1759677812579256161?= From: "H. Peter Anvin (Intel)" Add a debug fault entry stub for FRED. On a FRED system, the debug trap status information (DR6) is passed on the stack, to avoid the problem of transient state. Furthermore, FRED transitions avoid a lot of ugly corner cases the handling of which can, and should be, skipped. The FRED debug trap status information saved on the stack differs from DR6 in both stickiness and polarity; it is exactly what debug_read_clear_dr6() returns, and exc_debug_user()/exc_debug_kernel() expect. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- Changes since v1: * call irqentry_nmi_{enter,exit}() in both IDT and FRED debug fault kernel handler (Peter Zijlstra). --- arch/x86/include/asm/fred.h | 1 + arch/x86/kernel/traps.c | 56 +++++++++++++++++++++++++++---------- 2 files changed, 42 insertions(+), 15 deletions(-) diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h index 57affbf80ced..633dd9e6a68e 100644 --- a/arch/x86/include/asm/fred.h +++ b/arch/x86/include/asm/fred.h @@ -94,6 +94,7 @@ static __always_inline unsigned long fred_event_data(struct pt_regs *regs) #define DEFINE_FRED_HANDLER(f) noinstr DECLARE_FRED_HANDLER(f) typedef DECLARE_FRED_HANDLER((*fred_handler)); +DECLARE_FRED_HANDLER(fred_exc_debug); DECLARE_FRED_HANDLER(fred_exc_page_fault); #endif /* __ASSEMBLY__ */ diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index cebba1f49e19..4b0f63344526 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -47,6 +47,7 @@ #include #include #include +#include #include #include #include @@ -1020,21 +1021,9 @@ static bool notify_debug(struct pt_regs *regs, unsigned long *dr6) return false; } -static __always_inline void exc_debug_kernel(struct pt_regs *regs, - unsigned long dr6) +static __always_inline void debug_kernel_common(struct pt_regs *regs, + unsigned long dr6) { - /* - * Disable breakpoints during exception handling; recursive exceptions - * are exceedingly 'fun'. - * - * Since this function is NOKPROBE, and that also applies to - * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a - * HW_BREAKPOINT_W on our stack) - * - * Entry text is excluded for HW_BP_X and cpu_entry_area, which - * includes the entry stack is excluded for everything. - */ - unsigned long dr7 = local_db_save(); irqentry_state_t irq_state = irqentry_nmi_enter(regs); instrumentation_begin(); @@ -1062,7 +1051,8 @@ static __always_inline void exc_debug_kernel(struct pt_regs *regs, * Catch SYSENTER with TF set and clear DR_STEP. If this hit a * watchpoint at the same time then that will still be handled. */ - if ((dr6 & DR_STEP) && is_sysenter_singlestep(regs)) + if (!cpu_feature_enabled(X86_FEATURE_FRED) && + (dr6 & DR_STEP) && is_sysenter_singlestep(regs)) dr6 &= ~DR_STEP; /* @@ -1090,7 +1080,25 @@ static __always_inline void exc_debug_kernel(struct pt_regs *regs, out: instrumentation_end(); irqentry_nmi_exit(regs, irq_state); +} +static __always_inline void exc_debug_kernel(struct pt_regs *regs, + unsigned long dr6) +{ + /* + * Disable breakpoints during exception handling; recursive exceptions + * are exceedingly 'fun'. + * + * Since this function is NOKPROBE, and that also applies to + * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a + * HW_BREAKPOINT_W on our stack) + * + * Entry text is excluded for HW_BP_X and cpu_entry_area, which + * includes the entry stack is excluded for everything. + */ + unsigned long dr7 = local_db_save(); + + debug_kernel_common(regs, dr6); local_db_restore(dr7); } @@ -1179,6 +1187,24 @@ DEFINE_IDTENTRY_DEBUG_USER(exc_debug) { exc_debug_user(regs, debug_read_clear_dr6()); } + +# ifdef CONFIG_X86_FRED +DEFINE_FRED_HANDLER(fred_exc_debug) +{ + /* + * The FRED debug information saved onto stack differs from + * DR6 in both stickiness and polarity; it is exactly what + * debug_read_clear_dr6() returns. + */ + unsigned long dr6 = fred_event_data(regs); + + if (user_mode(regs)) + exc_debug_user(regs, dr6); + else + debug_kernel_common(regs, dr6); +} +# endif /* CONFIG_X86_FRED */ + #else /* 32 bit does not have separate entry points. */ DEFINE_IDTENTRY_RAW(exc_debug)