From patchwork Tue Mar 7 02:39:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 65218 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp2209596wrd; Mon, 6 Mar 2023 19:07:10 -0800 (PST) X-Google-Smtp-Source: AK7set+dk14xDt+yTl5lRx5GatOkgtKXqZvUajDzkLgDlcHgIstA9Q8lwDxXiSZ8eNOOsU9esLu4 X-Received: by 2002:a17:90a:1a53:b0:234:b4a7:2abd with SMTP id 19-20020a17090a1a5300b00234b4a72abdmr14139408pjl.12.1678158430220; Mon, 06 Mar 2023 19:07:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678158430; cv=none; d=google.com; s=arc-20160816; b=qCiSbdedyZhiV+yCeNkj3nZ9UN30ZUpR+US0MLLYoC0c9rkzyesQE+9XYn0nW9vptL Vlv3gncVws9ceZp7RzwKXVIzD+S6jAQ+gq8NaVfKWVeY4OsjZRl2MPA/Y9/b8cmIlmUX VfJyH/Zakskk56em4RKnbH/gaKPThDA9i2MxsmyXvDoDsnWsSzSReUFU+nV1FrOihOOn H4wDJGrxmTLeBFwRN80C5Bpg2E1ixzq8QUXL76zUsj31LQhjAurMQ0oiTtKw+AMgevSg dYv8w0jCCei1R/oF/s2pA+dKyV50RD5t7LhK78N3VbVefjQDsp1/vDIxJN9AgnjXTMH4 czRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OSlqpq1ELTxNU1ltDY4IZP23jYiWVSMftVLwVwljWLg=; b=SH72uEN2r3A5JWqnVJUqLUyAXpGNW3RxzV+dVZT9hewQlVRbaGuEkeaAIa/QM+pYLq nhIvTKjDu0EJtJr7f1MWY9skXn7epyRNq7d+vk+/uad4wjQxTQ+W7B39sZj90C9TRsIU /EEdc/C48M+e6k3+AvwaQHkpQl0cxpUMsGdO6DlrfsOoRodvo99EYHXrE1ZCZUZEQVAU G7/VTsxFY9XB2N7TTb2EFTmvmjZP8qgIDGMlYwimQxdJN3SqNHtpLHSNGdX7KnvzfpmH JwbnMZ8YM7U+kck43AQ7Zu10ePyboqryF1jq/IqWSkNVqKlr0MUkK6SdpHqzJeNLccFg TalA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="h/GU3U2H"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id l10-20020a17090a72ca00b00233e26df9dcsi10773416pjk.127.2023.03.06.19.06.57; Mon, 06 Mar 2023 19:07:10 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="h/GU3U2H"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229953AbjCGDGE (ORCPT + 99 others); Mon, 6 Mar 2023 22:06:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230244AbjCGDF2 (ORCPT ); Mon, 6 Mar 2023 22:05:28 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BF0979B03; Mon, 6 Mar 2023 19:05:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678158325; x=1709694325; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wcw4oWWYVKLi17TGIcBaJWkCmV6EYpXPXC/uF0gD9d8=; b=h/GU3U2HytzCtsGI5JWuWVQaCvlFQcnW1iAlVv5yIdKzlMEe/UywIlO4 TYjlQXrPHgIj0t3bCgHioyFOSUkHU9V3Lf/PWO6X+6s3syb4CtgvwE2aT RQ/P5s95OvLNzl5l9yEVbSijLJ4lSuC3iLrfBEtINmyKyi6WU/IM6GbUi a0GFbvirNsI0ibZYTiMeCxx8T02RZkvCklFdwG5jk4GOWfRckrukM5oKo d8TJ+4s+OB1y1x+AospMUomzEs7ClJPmedGSp6CeZCZqFj0lsn3YMjKlz 1mH8Eld6mgoSJBh61b8trZPW+QSirCFdEipN1NNvKWL+tAoS3ZRd20oIo w==; X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="338072410" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="338072410" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2023 19:05:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="676409793" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="676409793" Received: from unknown (HELO fred..) ([172.25.112.68]) by orsmga002.jf.intel.com with ESMTP; 06 Mar 2023 19:05:14 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, andrew.cooper3@citrix.com, seanjc@google.com, pbonzini@redhat.com, ravi.v.shankar@intel.com Subject: [PATCH v5 11/34] x86/fred: if CONFIG_X86_FRED is disabled, disable FRED support Date: Mon, 6 Mar 2023 18:39:23 -0800 Message-Id: <20230307023946.14516-12-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230307023946.14516-1-xin3.li@intel.com> References: <20230307023946.14516-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759676654006653447?= X-GMAIL-MSGID: =?utf-8?q?1759676654006653447?= From: "H. Peter Anvin (Intel)" Add CONFIG_X86_FRED to to make cpu_feature_enabled() work correctly with FRED. Originally-by: Megha Dey Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- arch/x86/include/asm/disabled-features.h | 8 +++++++- tools/arch/x86/include/asm/disabled-features.h | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h index 5dfa4fb76f4b..56838de9cb23 100644 --- a/arch/x86/include/asm/disabled-features.h +++ b/arch/x86/include/asm/disabled-features.h @@ -99,6 +99,12 @@ # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) #endif +#ifdef CONFIG_X86_FRED +# define DISABLE_FRED 0 +#else +# define DISABLE_FRED (1 << (X86_FEATURE_FRED & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -115,7 +121,7 @@ #define DISABLED_MASK10 0 #define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \ DISABLE_CALL_DEPTH_TRACKING) -#define DISABLED_MASK12 0 +#define DISABLED_MASK12 (DISABLE_FRED) #define DISABLED_MASK13 0 #define DISABLED_MASK14 0 #define DISABLED_MASK15 0 diff --git a/tools/arch/x86/include/asm/disabled-features.h b/tools/arch/x86/include/asm/disabled-features.h index c44b56f7ffba..2d3ec539dcc7 100644 --- a/tools/arch/x86/include/asm/disabled-features.h +++ b/tools/arch/x86/include/asm/disabled-features.h @@ -99,6 +99,12 @@ # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) #endif +#ifdef CONFIG_X86_FRED +# define DISABLE_FRED 0 +#else +# define DISABLE_FRED (1 << (X86_FEATURE_FRED & 31)) +#endif + /* * Make sure to add features to the correct mask */ @@ -115,7 +121,7 @@ #define DISABLED_MASK10 0 #define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \ DISABLE_CALL_DEPTH_TRACKING) -#define DISABLED_MASK12 0 +#define DISABLED_MASK12 (DISABLE_FRED) #define DISABLED_MASK13 0 #define DISABLED_MASK14 0 #define DISABLED_MASK15 0