From patchwork Thu Mar 16 08:51:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 70677 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:604a:0:0:0:0:0 with SMTP id j10csp365831wrt; Thu, 16 Mar 2023 02:01:03 -0700 (PDT) X-Google-Smtp-Source: AK7set8QkumncT2xvlSHWBAFcCXVUfA7sNm17sF3THUWOPApLsza4VJpfeZXREfV1iz+m/SXtTiU X-Received: by 2002:a17:90b:3881:b0:237:a500:eca6 with SMTP id mu1-20020a17090b388100b00237a500eca6mr2842890pjb.22.1678957263182; Thu, 16 Mar 2023 02:01:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678957263; cv=none; d=google.com; s=arc-20160816; b=EZL+lyNSvXKXx5uWyTp34a/XZ1DPQyO8/qKDd5oX2XzhFCEF9wVlloo1eEVGNFvbEN 5F05YnNNsoW6dGtrdAKq+JX9YLsaPOWdgovE3h8JwghGPJK7kLqvJHSwcWsHI7+cx6EL NxzCOMiJrI3cJ0CoIn62I8h3W94uHcubbIBsBCQdWH9p3r6MtHeZPYMxysc3+i0qIp7D b8oIPMf3X4drEuG5xjHSCVrToiuGMGNvij4gc0LRmhcb85DVFWpB4lH62EmXic8KLngu mf98lnm8v2OUGH5aSkuLGDdgbB1138O/6mfwfGQKEzfrCfcczLZPAeQW4M0Ixxgo+/+I T7dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=trDR/uvLe/V6VLzaDteKq/rsAiS4wsOKIjhWSh+qVJa2mwqmVeSdTpBC15dX15Hacx aHmIBCGBu24ZHHc8CGoPOn/zz+WjnFmJr+T/vdPC1o9JssKSSSbQdPyFp4h9ncDXb4LJ zL5cz3jc1CxtFp6KsJnZANscff1AKfxhrXaX8wGc/rPzaX+3heyTlJDszuBQR4jdSRwv F5/7cVpdRCN6KMPm7OduoljA8nsor40uKeVpjTYEOO07gM3nCGmE0rZIO2t0fZg4lY5c mkbgVg0xkLBGEfdSWzkJCbKCzJJWDmT/D3fgR88APNRXgDod72whMX860DV8K/xXvCOa /Ugg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DDPaJtHj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x15-20020a17090a6b4f00b0023d387cbcb4si3760479pjl.14.2023.03.16.02.00.50; Thu, 16 Mar 2023 02:01:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DDPaJtHj; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229453AbjCPIxR (ORCPT + 99 others); Thu, 16 Mar 2023 04:53:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231241AbjCPIwZ (ORCPT ); Thu, 16 Mar 2023 04:52:25 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6ABE3B693C for ; Thu, 16 Mar 2023 01:51:22 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id z5so840047ljc.8 for ; Thu, 16 Mar 2023 01:51:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678956675; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=DDPaJtHjcKpwFgphAHT7tW3YyX/ZBZFs4Kfd67iuNJukELpZtr1GakaX95MMe2hU+C MJGmgh1of7xVfJv/Lms4bnw93C/LwMOS9I2SH768wi7fOcwsngjxP/1AePDbgBeATAnc xUyoPUu8BcDvx4DYTZszrlhHsiIFh0XejBvuLq0TkdEYeFTwSt53y3g0f2QLDrtKTrKw 5LQornKEDn/SIK7JKDi9ThjgpZ1r9PRN2rMEFYQynLHr7crxITBT7TLUL6EOkLO7JKns BV4JfqXr0dV96PRYElzqil3YSbwyDdt8gzjyx50rGEwdOfkot6BWZuWD+jwJyCCWPNAT ZCZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678956675; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6mz7dhLEVkKzAk8Lkvywe3WYisGA69PWt7jvCUOITN8=; b=0yPAD8rXeL+hQufS+z8xPXzf2KNK/iTEt13b2m8t1Yxg6Mi0tAL3af+E7Vd8uYoH6k NLhWiVTE1wquao0LVHvTB2Ll7xSWOawoErFE/bAC6oRmGR9K7zgbiUTNzqNSH0q4Gav/ bHZFDNVw2ach8P4rnJ/MipTynv7kZFO67nNEao5GFGsb3zgQNioQCXFzoOkke7uxdkoa cPj1greTPa0Y/Cu2e8Vcnheo8GmZQMNZhk1MdOqSO8UeiMwuTcXHG/H1U/tnDBhAE3uR vGuROPgBlnAzltib0/nUL3+5UWYqv/ypruGD10dywNQMqEd0dhaSYbjfEKKvlbfFLAMY ZWfQ== X-Gm-Message-State: AO0yUKUCIv4QTqHIsNqeLNF15Wg4/Yt8+wWn+sAKuN6tt1XXkISpNnzX 1CF3ZG+/E/lBFQWSsOvryKJpXg== X-Received: by 2002:a05:651c:2228:b0:299:67d8:9f7a with SMTP id y40-20020a05651c222800b0029967d89f7amr752102ljq.5.1678956675474; Thu, 16 Mar 2023 01:51:15 -0700 (PDT) Received: from [192.168.1.101] (abyj16.neoplus.adsl.tpnet.pl. [83.9.29.16]) by smtp.gmail.com with ESMTPSA id o11-20020a2e730b000000b002991baef49bsm251566ljc.12.2023.03.16.01.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 01:51:15 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 09:51:09 +0100 Subject: [PATCH v5 03/10] drm/msm/dsi: Fix DSI index detection when version clash occurs MIME-Version: 1.0 Message-Id: <20230307-topic-dsi_qcm-v5-3-9d4235b77f4f@linaro.org> References: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> In-Reply-To: <20230307-topic-dsi_qcm-v5-0-9d4235b77f4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan , Bryan O'Donoghue , Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678956668; l=8216; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=b+otjvnFVNWNHQbPO9HD+5KH7xMK3hiBo7WDBK4sSP4=; b=zcYTSWk9trCd7D8dSdCu9WiEcEvyemZhiibqk3qRm4btFIPGbbejZOnG5Dr/fOBmtZqtARwLme+v cmwIntkeAoYq0GWtjSdwnKc1oX/DsFhNqMjEa8wFIVy+o6n4EpoQ X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760514291066087494?= X-GMAIL-MSGID: =?utf-8?q?1760514291066087494?= Currently, we allow for MAX_DSI entries in io_start to facilitate for MAX_DSI number of DSI hosts at different addresses. The configuration is matched against the DSI CTRL hardware revision read back from the component. We need a way to resolve situations where multiple SoCs with different register maps may use the same version of DSI CTRL. In preparation to do so, make msm_dsi_config a 2d array where each entry represents a set of configurations adequate for a given SoC. This is totally fine to do, as the only differentiating factors between same-version-different-SoCs configurations are the number of DSI hosts (1 or 2, at least as of today) and the set of base registers. The regulator setup is the same, because the DSI hardware is the same, regardless of the SoC it was implemented in. In addition to that, update the matching logic such that it will loop over VARIANTS_MAX variants, making sure they are all taken into account. Reviewed-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 ++++++++++++++++++++++++++++---------- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 5 +++- drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++++---- 3 files changed, 48 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c index 4515f52b407a..6c192963c100 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c @@ -21,7 +21,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = { .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators), .bus_clk_names = dsi_v2_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names), - .io_start = { 0x4700000, 0x5800000 }, + .io_start = { + { 0x4700000, 0x5800000 }, + }, }; static const char * const dsi_6g_bus_clk_names[] = { @@ -40,7 +42,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd922800, 0xfd922b00 }, + .io_start = { + { 0xfd922800, 0xfd922b00 }, + }, }; static const char * const dsi_8916_bus_clk_names[] = { @@ -58,7 +62,9 @@ static const struct msm_dsi_config msm8916_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators), .bus_clk_names = dsi_8916_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names), - .io_start = { 0x1a98000 }, + .io_start = { + { 0x1a98000 }, + }, }; static const char * const dsi_8976_bus_clk_names[] = { @@ -76,7 +82,9 @@ static const struct msm_dsi_config msm8976_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators), .bus_clk_names = dsi_8976_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names), - .io_start = { 0x1a94000, 0x1a96000 }, + .io_start = { + { 0x1a94000, 0x1a96000 }, + }, }; static const struct regulator_bulk_data msm8994_dsi_regulators[] = { @@ -94,7 +102,9 @@ static const struct msm_dsi_config msm8994_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8994_dsi_regulators), .bus_clk_names = dsi_6g_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names), - .io_start = { 0xfd998000, 0xfd9a0000 }, + .io_start = { + { 0xfd998000, 0xfd9a0000 }, + }, }; static const char * const dsi_8996_bus_clk_names[] = { @@ -113,7 +123,9 @@ static const struct msm_dsi_config msm8996_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8996_dsi_regulators), .bus_clk_names = dsi_8996_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names), - .io_start = { 0x994000, 0x996000 }, + .io_start = { + { 0x994000, 0x996000 }, + }, }; static const char * const dsi_msm8998_bus_clk_names[] = { @@ -131,7 +143,9 @@ static const struct msm_dsi_config msm8998_dsi_cfg = { .num_regulators = ARRAY_SIZE(msm8998_dsi_regulators), .bus_clk_names = dsi_msm8998_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm660_bus_clk_names[] = { @@ -148,7 +162,9 @@ static const struct msm_dsi_config sdm660_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm660_dsi_regulators), .bus_clk_names = dsi_sdm660_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names), - .io_start = { 0xc994000, 0xc996000 }, + .io_start = { + { 0xc994000, 0xc996000 }, + }, }; static const char * const dsi_sdm845_bus_clk_names[] = { @@ -169,7 +185,9 @@ static const struct msm_dsi_config sdm845_dsi_cfg = { .num_regulators = ARRAY_SIZE(sdm845_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sm8550_dsi_regulators[] = { @@ -182,7 +200,9 @@ static const struct msm_dsi_config sm8550_dsi_cfg = { .num_regulators = ARRAY_SIZE(sm8550_dsi_regulators), .bus_clk_names = dsi_sdm845_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const struct regulator_bulk_data sc7180_dsi_regulators[] = { @@ -195,7 +215,9 @@ static const struct msm_dsi_config sc7180_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7180_dsi_regulators), .bus_clk_names = dsi_sc7180_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names), - .io_start = { 0xae94000 }, + .io_start = { + { 0xae94000 }, + }, }; static const char * const dsi_sc7280_bus_clk_names[] = { @@ -212,7 +234,9 @@ static const struct msm_dsi_config sc7280_dsi_cfg = { .num_regulators = ARRAY_SIZE(sc7280_dsi_regulators), .bus_clk_names = dsi_sc7280_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names), - .io_start = { 0xae94000, 0xae96000 }, + .io_start = { + { 0xae94000, 0xae96000 }, + }, }; static const char * const dsi_qcm2290_bus_clk_names[] = { @@ -229,7 +253,9 @@ static const struct msm_dsi_config qcm2290_dsi_cfg = { .num_regulators = ARRAY_SIZE(qcm2290_dsi_cfg_regulators), .bus_clk_names = dsi_qcm2290_bus_clk_names, .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names), - .io_start = { 0x5e94000 }, + .io_start = { + { 0x5e94000 }, + }, }; static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = { diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.h b/drivers/gpu/drm/msm/dsi/dsi_cfg.h index 6b6b16c5fd25..8772a3631ac1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_cfg.h +++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.h @@ -32,13 +32,16 @@ #define DSI_6G_REG_SHIFT 4 +/* Maximum number of configurations matched against the same hw revision */ +#define VARIANTS_MAX 2 + struct msm_dsi_config { u32 io_offset; const struct regulator_bulk_data *regulator_data; int num_regulators; const char * const *bus_clk_names; const int num_bus_clks; - const resource_size_t io_start[DSI_MAX]; + const resource_size_t io_start[VARIANTS_MAX][DSI_MAX]; }; struct msm_dsi_host_cfg_ops { diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 9021f0d65515..9cfb9e91bfea 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -1862,16 +1862,16 @@ static int dsi_host_get_id(struct msm_dsi_host *msm_host) struct platform_device *pdev = msm_host->pdev; const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; struct resource *res; - int i; + int i, j; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dsi_ctrl"); if (!res) return -EINVAL; - for (i = 0; i < DSI_MAX; i++) { - if (cfg->io_start[i] == res->start) - return i; - } + for (i = 0; i < VARIANTS_MAX; i++) + for (j = 0; j < DSI_MAX; j++) + if (cfg->io_start[i][j] == res->start) + return j; return -EINVAL; }