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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z20-20020aa7cf94000000b004bbce7cda40si10741097edx.178.2023.03.06.06.21.41; Mon, 06 Mar 2023 06:22:04 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=FDiNddf3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231298AbjCFOJE (ORCPT + 99 others); Mon, 6 Mar 2023 09:09:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231208AbjCFOIW (ORCPT ); Mon, 6 Mar 2023 09:08:22 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6A0231E21; Mon, 6 Mar 2023 06:07:20 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id E62696602FEB; Mon, 6 Mar 2023 14:06:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1678111597; bh=KDIL5SNtoCXM34KiIJrrDWAk4hB0wwXMlCoYVFO/umo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FDiNddf3YSsa+bqU4vac2TgcwvF+EkqjV9jwUhe0fJRpEVmLkh/kzT4yzE3Te+PxE LNh22wePGVX9+xEvWDh3GeLQIhJEu048Y239o9OMDyFy2BlPidHN/EuIsQxmYpWTv9 TtiSdEYhjkBVtGOyTsVHAC/loE3lEf1zoSRhU6y+XwjqS5WaSh+WnoqwjKotk9nOj2 0A4ihHDT/liTv2rYJyV1J8ZgHRmKmPSATBcFwbwOS7YJb0X0AZz9n0lTSfyWeDK2U3 58+sJ5yOGiuZwEqV/IGU3x9u1TogHSpni73hlWlowvJQkKzeBWFosIKCXxfzfKZx0E oESBqk2l1exOw== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, chun-jie.chen@mediatek.com, daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, zhaojh329@gmail.com, sam.shih@mediatek.com, edward-jw.yang@mediatek.com, yangyingliang@huawei.com, granquet@baylibre.com, pablo.sun@mediatek.com, sean.wang@mediatek.com, chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com Subject: [PATCH v6 31/54] clk: mediatek: Propagate struct device with mtk_clk_register_dividers() Date: Mon, 6 Mar 2023 15:05:20 +0100 Message-Id: <20230306140543.1813621-32-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230306140543.1813621-1-angelogioacchino.delregno@collabora.com> References: <20230306140543.1813621-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759628518856279046?= X-GMAIL-MSGID: =?utf-8?q?1759628518856279046?= Propagate struct device for divider clocks registered through clk-mtk helpers to be able to get runtime PM support for MTK clocks. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai Tested-by: Chen-Yu Tsai # MT8183, MT8192, MT8195 Chromebooks --- drivers/clk/mediatek/clk-mt2701.c | 2 +- drivers/clk/mediatek/clk-mt8167-apmixedsys.c | 2 +- drivers/clk/mediatek/clk-mtk.c | 8 +++++--- drivers/clk/mediatek/clk-mtk.h | 3 ++- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index dfe328f7a44b..e9c27b1364b6 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c @@ -681,7 +681,7 @@ static int mtk_topckgen_init(struct platform_device *pdev) ARRAY_SIZE(top_muxes), base, &mt2701_clk_lock, clk_data); - mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), + mtk_clk_register_dividers(&pdev->dev, top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt2701_clk_lock, clk_data); mtk_clk_register_gates(&pdev->dev, node, top_clks, diff --git a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c index ebd90365be5f..27597fdeb6e9 100644 --- a/drivers/clk/mediatek/clk-mt8167-apmixedsys.c +++ b/drivers/clk/mediatek/clk-mt8167-apmixedsys.c @@ -109,7 +109,7 @@ static int clk_mt8167_apmixed_probe(struct platform_device *pdev) if (ret) return ret; - ret = mtk_clk_register_dividers(adj_divs, ARRAY_SIZE(adj_divs), base, + ret = mtk_clk_register_dividers(dev, adj_divs, ARRAY_SIZE(adj_divs), base, &mt8167_apmixed_clk_lock, clk_data); if (ret) goto unregister_plls; diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 01224cfbcc79..fd2214c3242f 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -393,7 +393,8 @@ void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num, } EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites); -int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, +int mtk_clk_register_dividers(struct device *dev, + const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data) { @@ -412,7 +413,7 @@ int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, continue; } - hw = clk_hw_register_divider(NULL, mcd->name, mcd->parent_name, + hw = clk_hw_register_divider(dev, mcd->name, mcd->parent_name, mcd->flags, base + mcd->div_reg, mcd->div_shift, mcd->div_width, mcd->clk_divider_flags, lock); @@ -535,7 +536,8 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev, } if (mcd->divider_clks) { - r = mtk_clk_register_dividers(mcd->divider_clks, + r = mtk_clk_register_dividers(&pdev->dev, + mcd->divider_clks, mcd->num_divider_clks, base, mcd->clk_lock, clk_data); if (r) diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 554aecdc1015..b7a751861fce 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -202,7 +202,8 @@ struct mtk_clk_divider { .div_width = _width, \ } -int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, +int mtk_clk_register_dividers(struct device *dev, + const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, struct clk_hw_onecell_data *clk_data); void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,