From patchwork Mon Mar 6 14:05:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 64711 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp1869476wrd; Mon, 6 Mar 2023 06:24:08 -0800 (PST) X-Google-Smtp-Source: AK7set+VqF25fT65BGKHeRe2EEGGykuEitqz1eYoueJOHltGnm51XP0r26EsQWoK8U/gIEYWzUU0 X-Received: by 2002:aa7:d80c:0:b0:4ad:6db4:b922 with SMTP id v12-20020aa7d80c000000b004ad6db4b922mr10791380edq.14.1678112648255; Mon, 06 Mar 2023 06:24:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1678112648; cv=none; d=google.com; s=arc-20160816; b=MUljcTtQl1GysHFLxy/BKm9zII8+0N/JKKlzfOowEboOFy1uZjD3BS1dz17qGr0GLN O87l0AfKRuLxtmbFILaPJeT0v/AEX+TSv3AgqIg2s7uAy3K8oQQsdtMLiA6nG7vm2plZ E7pfnQsrNxFzcRFsRIlje/KEoFbA5swXDuH2R09rS406d13zxow0iGaJTMeM98LGC60X rrCmVJVU4Gw7edR4m0YwLPz7NSHrO6VyRyp1M9IKidG7tTdiZNu2U4xOw7BmgHEsegkT SGmKROFgp3zRkSta2NDRO5h7cMZcLo0k9snX5JO0uZLHuR+ryMg7oL4ivWvCO9vassOB UsjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jc3h90vgchjWnP75T66MBb0xi3cWw10x5G09byQUvyc=; b=vlCprjXdiJ/Jvst+EiJ7mi0bWTVY/sbM3H6j0t4SfAo8n0z5vTZB+sAjtYz5KV7CNZ 6H0EozwpLQ8sSD2D6+8/DJAw3DEW5mvxV7BWRDsZ/ZrE4Wvg0za41RLROMVb0+kb6pud WCvYwIWZwqWjLsRj3H5Nf7pu1pHFuXQ0DIPIvIv0NY2oDVR/tY8j6cqNmlAkCps6ymQD F9mDt8LXHKpksQ3+n5kD2D/KHv2qLnLLqcE3GIHjTH9XkxWe4BdjDARICo2yPp90ZsgI ldVMkogy2GsML622oV2inb+XYHQniU0yZp41Q0pIRg2UFTkP36/jMphKWsVei3llzKSc u9lA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="LI0Bd/JJ"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p16-20020aa7d310000000b004ab454a637esi166142edq.334.2023.03.06.06.23.44; Mon, 06 Mar 2023 06:24:08 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="LI0Bd/JJ"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230260AbjCFOIs (ORCPT + 99 others); Mon, 6 Mar 2023 09:08:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36144 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230464AbjCFOIU (ORCPT ); Mon, 6 Mar 2023 09:08:20 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D284C311E9; Mon, 6 Mar 2023 06:07:16 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C42D46602FE6; Mon, 6 Mar 2023 14:06:29 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1678111591; bh=54rtohhxjUnNg94k+D4u+zNWfirVgEZ8FSiv7Qj0vAQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LI0Bd/JJxz8qaaKJ3SnftpZrjmiF6UxgWYFpKSuoF+/t7BfOxZ+kaJHDZN+3divxI 6Y9nOsZTfJi2UoIpGFtvcY7CuDIkXiTunUR0t23QsNTBU4hy95Xmol8vBpK+jxb143 pnjNzeAC+cUwjZ2rM85ZCf94Nm+3+nMRA3ZjMTVuXFbtaalRxn+1dAn4tpbcZ8hYzw UHIQLInuxBgHBK6NPRPrw3+i7YkZ9s3O0fwrkVRT/RH/mwJKKtmE6+taycMSNspeY8 c9kwiKdXp6xG8KadM88kIGvDeyI62NTaHDsgpvXJCFzXuvjycFeaLQnkHGYqcUBOec YBf1Wxnm05+rg== From: AngeloGioacchino Del Regno To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, chun-jie.chen@mediatek.com, daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, zhaojh329@gmail.com, sam.shih@mediatek.com, edward-jw.yang@mediatek.com, yangyingliang@huawei.com, granquet@baylibre.com, pablo.sun@mediatek.com, sean.wang@mediatek.com, chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com Subject: [PATCH v6 27/54] clk: mediatek: mt7622: Convert to platform driver and simple probe Date: Mon, 6 Mar 2023 15:05:16 +0100 Message-Id: <20230306140543.1813621-28-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230306140543.1813621-1-angelogioacchino.delregno@collabora.com> References: <20230306140543.1813621-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759628648555007378?= X-GMAIL-MSGID: =?utf-8?q?1759628648555007378?= Convert the MT7622 topckgen and pericfg clock drivers to platform drivers and use the simple probe mechanism. This also allows to build these clocks as modules. Thanks to the conversion, more error handling was added to the clocks registration. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai --- drivers/clk/mediatek/clk-mt7622.c | 125 ++++++++---------------------- 1 file changed, 31 insertions(+), 94 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c index fb813f8d3a7d..7a002b73fcaa 100644 --- a/drivers/clk/mediatek/clk-mt7622.c +++ b/drivers/clk/mediatek/clk-mt7622.c @@ -490,107 +490,44 @@ static const struct mtk_clk_rst_desc clk_rst_desc = { .rst_bank_nr = ARRAY_SIZE(pericfg_rst_ofs), }; -static int mtk_topckgen_init(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - void __iomem *base; - struct device_node *node = pdev->dev.of_node; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); - - mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), - clk_data); - - mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), - clk_data); - - mtk_clk_register_composites(&pdev->dev, top_muxes, - ARRAY_SIZE(top_muxes), base, - &mt7622_clk_lock, clk_data); - - mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), - base, &mt7622_clk_lock, clk_data); - - mtk_clk_register_gates(&pdev->dev, node, top_clks, - ARRAY_SIZE(top_clks), clk_data); - - return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); -} - -static int mtk_pericfg_init(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - void __iomem *base; - int r; - struct device_node *node = pdev->dev.of_node; - - base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(base)) - return PTR_ERR(base); - - clk_data = mtk_alloc_clk_data(CLK_PERI_NR_CLK); - - mtk_clk_register_gates(&pdev->dev, node, peri_clks, - ARRAY_SIZE(peri_clks), clk_data); - - mtk_clk_register_composites(&pdev->dev, peri_muxes, - ARRAY_SIZE(peri_muxes), base, - &mt7622_clk_lock, clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - return r; - - mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc); - - return 0; -} +static const struct mtk_clk_desc topck_desc = { + .clks = top_clks, + .num_clks = ARRAY_SIZE(top_clks), + .fixed_clks = top_fixed_clks, + .num_fixed_clks = ARRAY_SIZE(top_fixed_clks), + .factor_clks = top_divs, + .num_factor_clks = ARRAY_SIZE(top_divs), + .composite_clks = top_muxes, + .num_composite_clks = ARRAY_SIZE(top_muxes), + .divider_clks = top_adj_divs, + .num_divider_clks = ARRAY_SIZE(top_adj_divs), + .clk_lock = &mt7622_clk_lock, +}; + +static const struct mtk_clk_desc peri_desc = { + .clks = peri_clks, + .num_clks = ARRAY_SIZE(peri_clks), + .composite_clks = peri_muxes, + .num_composite_clks = ARRAY_SIZE(peri_muxes), + .rst_desc = &clk_rst_desc, + .clk_lock = &mt7622_clk_lock, +}; static const struct of_device_id of_match_clk_mt7622[] = { - { - .compatible = "mediatek,mt7622-topckgen", - .data = mtk_topckgen_init, - }, { - .compatible = "mediatek,mt7622-pericfg", - .data = mtk_pericfg_init, - }, { - /* sentinel */ - } -}; - -static int clk_mt7622_probe(struct platform_device *pdev) -{ - int (*clk_init)(struct platform_device *); - int r; - - clk_init = of_device_get_match_data(&pdev->dev); - if (!clk_init) - return -EINVAL; - - r = clk_init(pdev); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} + { .compatible = "mediatek,mt7622-topckgen", .data = &topck_desc }, + { .compatible = "mediatek,mt7622-pericfg", .data = &peri_desc }, + { /* sentinel */ } +}; static struct platform_driver clk_mt7622_drv = { - .probe = clk_mt7622_probe, .driver = { .name = "clk-mt7622", .of_match_table = of_match_clk_mt7622, }, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, }; +module_platform_driver(clk_mt7622_drv) -static int clk_mt7622_init(void) -{ - return platform_driver_register(&clk_mt7622_drv); -} - -arch_initcall(clk_mt7622_init); +MODULE_DESCRIPTION("MediaTek MT7622 clocks driver"); +MODULE_LICENSE("GPL");