Message ID | 20230306040739.51488-5-blarson@amd.com |
---|---|
State | New |
Headers |
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Sun, 5 Mar 2023 22:08:41 -0600 From: Brad Larson <blarson@amd.com> To: <linux-arm-kernel@lists.infradead.org> CC: <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>, <linux-spi@vger.kernel.org>, <adrian.hunter@intel.com>, <alcooperx@gmail.com>, <andy.shevchenko@gmail.com>, <arnd@arndb.de>, <blarson@amd.com>, <brendan.higgins@linux.dev>, <briannorris@chromium.org>, <brijeshkumar.singh@amd.com>, <catalin.marinas@arm.com>, <davidgow@google.com>, <gsomlo@gmail.com>, <gerg@linux-m68k.org>, <krzk@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <lee@kernel.org>, <lee.jones@linaro.org>, <broonie@kernel.org>, <yamada.masahiro@socionext.com>, <p.zabel@pengutronix.de>, <piotrs@cadence.com>, <p.yadav@ti.com>, <rdunlap@infradead.org>, <robh+dt@kernel.org>, <samuel@sholland.org>, <fancer.lancer@gmail.com>, <skhan@linuxfoundation.org>, <suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>, <tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>, <vaishnav.a@ti.com>, <will@kernel.org>, <devicetree@vger.kernel.org> Subject: [PATCH v10 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller Date: Sun, 5 Mar 2023 20:07:28 -0800 Message-ID: <20230306040739.51488-5-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230306040739.51488-1-blarson@amd.com> References: <20230306040739.51488-1-blarson@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT025:EE_|PH7PR12MB6657:EE_ X-MS-Office365-Filtering-Correlation-Id: 2df79922-321d-4a5c-43e3-08db1df87a77 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Support AMD Pensando Elba SoC
|
|
Commit Message
Brad Larson
March 6, 2023, 4:07 a.m. UTC
The AMD Pensando Elba SoC has integrated the DW APB SPI Controller
Signed-off-by: Brad Larson <blarson@amd.com>
---
v10 changes:
- Move definition of amd,pensando-elba-syscon into properties
with a better description
- Add amd,pensando-elba-syscon: false for non elba designs
v9 changes:
- Define property amd,pensando-elba-syscon
- Move compatible amd,pensando-elba-spi ahead of baikal,bt1-ssi
---
.../bindings/spi/snps,dw-apb-ssi.yaml | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
Comments
On 06/03/2023 05:07, Brad Larson wrote: > The AMD Pensando Elba SoC has integrated the DW APB SPI Controller > > Signed-off-by: Brad Larson <blarson@amd.com> > --- > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On Sun, Mar 05, 2023 at 08:07:28PM -0800, Brad Larson wrote: > The AMD Pensando Elba SoC has integrated the DW APB SPI Controller > > Signed-off-by: Brad Larson <blarson@amd.com> Looks good. Thanks! Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > --- > > v10 changes: > - Move definition of amd,pensando-elba-syscon into properties > with a better description > - Add amd,pensando-elba-syscon: false for non elba designs > > v9 changes: > - Define property amd,pensando-elba-syscon > - Move compatible amd,pensando-elba-spi ahead of baikal,bt1-ssi > > --- > .../bindings/spi/snps,dw-apb-ssi.yaml | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > index a132b5fc56e0..2383d6497b1e 100644 > --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml > @@ -37,6 +37,17 @@ allOf: > else: > required: > - interrupts > + - if: > + properties: > + compatible: > + contains: > + const: amd,pensando-elba-spi > + then: > + required: > + - amd,pensando-elba-syscon > + else: > + properties: > + amd,pensando-elba-syscon: false > > properties: > compatible: > @@ -63,6 +74,8 @@ properties: > const: intel,keembay-ssi > - description: Intel Thunder Bay SPI Controller > const: intel,thunderbay-ssi > + - description: AMD Pensando Elba SoC SPI Controller > + const: amd,pensando-elba-spi > - description: Baikal-T1 SPI Controller > const: baikal,bt1-ssi > - description: Baikal-T1 System Boot SPI Controller > @@ -136,6 +149,12 @@ properties: > of the designware controller, and the upper limit is also subject to > controller configuration. > > + amd,pensando-elba-syscon: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: | > + Block address to control SPI chip-selects. The Elba SoC > + does not use ssi. > + > patternProperties: > "^.*@[0-9a-f]+$": > type: object > -- > 2.17.1 >
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index a132b5fc56e0..2383d6497b1e 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -37,6 +37,17 @@ allOf: else: required: - interrupts + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-spi + then: + required: + - amd,pensando-elba-syscon + else: + properties: + amd,pensando-elba-syscon: false properties: compatible: @@ -63,6 +74,8 @@ properties: const: intel,keembay-ssi - description: Intel Thunder Bay SPI Controller const: intel,thunderbay-ssi + - description: AMD Pensando Elba SoC SPI Controller + const: amd,pensando-elba-spi - description: Baikal-T1 SPI Controller const: baikal,bt1-ssi - description: Baikal-T1 System Boot SPI Controller @@ -136,6 +149,12 @@ properties: of the designware controller, and the upper limit is also subject to controller configuration. + amd,pensando-elba-syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + Block address to control SPI chip-selects. The Elba SoC + does not use ssi. + patternProperties: "^.*@[0-9a-f]+$": type: object