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Sun, 5 Mar 2023 22:09:39 -0600 From: Brad Larson To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v10 09/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Date: Sun, 5 Mar 2023 20:07:33 -0800 Message-ID: <20230306040739.51488-10-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230306040739.51488-1-blarson@amd.com> References: <20230306040739.51488-1-blarson@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT069:EE_|MW4PR12MB7468:EE_ X-MS-Office365-Filtering-Correlation-Id: 249ddea2-1c2f-4bec-59b5-08db1df89d61 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: n4YyyQZvqn0nOU6KfkG2zLLmg3/a4MU+DIbop/X6FngkwFw2vcgFXgDTBK0tuQK2fF9gc4yvdDnlMzZ8VwSvvJC95Dh5B1HPMlv4axiOTsybhaiYbSXfoRzHF8yvGxrXx4b6oqSG0oULEK3y0y6IJRpomqQsc3tys7TlkyfxFph/fvAZ2Quh2XbY7RhtaTCxV/1R2oOlwrbbi0uAtwku3WYo8+AMolEdGA+Yv/Ph6Fq0JZpAXAEejVr0mK+MHi/aub8S4joeUcpkqJchC7mElXBfsy67eRTyoqlI65Pi0glmjLbjDhUvX8hwdLLj3jEqHLLm328HxvdrCIq+d+AvgFF+ReculHTJlylQ4Yy/dUEhqKFy3g2y8hSzOZ/44DsAkoRIGCzxbFjbvp0/+txoYOQGZSLErlZl4iO5XnHun6Mgfwiz0gNkVAKn21aPo4D7aLKc8Lh6zHlBkPzvuCG8Boib5PuWBb6fabxjW9nvy11QTaPhXnmYI0eX/iSQ6MvSLybvnTxORbMzuSl0lnEYuYFFBirARJr4yZd82nPsgww0/G2exWh9HnD3BiLp7JPoiFXk3fm8UuJ8Lzw6wyrbYch/ulma/DeHZgZfSFY5cMxZHcKzQVbQSRC0V+UCR/mVO3ci5HP1EHC+8Uxi+XNBAZ5VtWUmxNZQo26YWMSGEcl/8Mr/KVn29uxtq4fLGFWMg9mpdn8xC8Yj64CwvgrFoqbHkoOXXckXaClPZyMObl0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(396003)(136003)(39860400002)(451199018)(36840700001)(46966006)(40470700004)(36756003)(426003)(47076005)(82740400003)(36860700001)(6666004)(1076003)(16526019)(186003)(26005)(336012)(40460700003)(2616005)(41300700001)(8936002)(70206006)(70586007)(40480700001)(4326008)(2906002)(8676002)(6916009)(7406005)(7416002)(5660300002)(81166007)(356005)(316002)(54906003)(478600001)(82310400005)(36900700001);DIR:OUT;SFP:1101; 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The quirk CQSPI_NEEDS_APB_AHB_HAZARD_WAR is added and if enabled a dummy readback from the controller is performed to ensure synchronization. Signed-off-by: Brad Larson --- v9 changes: - Rebase to linux-next 6.2.0-rc1 --- drivers/spi/spi-cadence-quadspi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 64b6a460d739..ad82d2ab3442 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -40,6 +40,7 @@ #define CQSPI_SUPPORT_EXTERNAL_DMA BIT(2) #define CQSPI_NO_SUPPORT_WR_COMPLETION BIT(3) #define CQSPI_SLOW_SRAM BIT(4) +#define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) /* Capabilities */ #define CQSPI_SUPPORTS_OCTAL BIT(0) @@ -90,6 +91,7 @@ struct cqspi_st { u32 pd_dev_id; bool wr_completion; bool slow_sram; + bool apb_ahb_hazard; }; struct cqspi_driver_platdata { @@ -1004,6 +1006,13 @@ static int cqspi_indirect_write_execute(struct cqspi_flash_pdata *f_pdata, if (cqspi->wr_delay) ndelay(cqspi->wr_delay); + /* + * If a hazard exists between the APB and AHB interfaces, perform a + * dummy readback from the controller to ensure synchronization. + */ + if (cqspi->apb_ahb_hazard) + readl(reg_base + CQSPI_REG_INDIRECTWR); + while (remaining > 0) { size_t write_words, mod_bytes; @@ -1734,6 +1743,8 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->wr_completion = false; if (ddata->quirks & CQSPI_SLOW_SRAM) cqspi->slow_sram = true; + if (ddata->quirks & CQSPI_NEEDS_APB_AHB_HAZARD_WAR) + cqspi->apb_ahb_hazard = true; if (of_device_is_compatible(pdev->dev.of_node, "xlnx,versal-ospi-1.0")) @@ -1859,6 +1870,10 @@ static const struct cqspi_driver_platdata versal_ospi = { .get_dma_status = cqspi_get_versal_dma_status, }; +static const struct cqspi_driver_platdata pensando_cdns_qspi = { + .quirks = CQSPI_NEEDS_APB_AHB_HAZARD_WAR | CQSPI_DISABLE_DAC_MODE, +}; + static const struct of_device_id cqspi_dt_ids[] = { { .compatible = "cdns,qspi-nor", @@ -1884,6 +1899,10 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "intel,socfpga-qspi", .data = &socfpga_qspi, }, + { + .compatible = "amd,pensando-elba-qspi", + .data = &pensando_cdns_qspi, + }, { /* end of table */ } };