Message ID | 20230303133647.845095-14-sunilvl@ventanamicro.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:5915:0:0:0:0:0 with SMTP id v21csp412704wrd; Fri, 3 Mar 2023 05:39:53 -0800 (PST) X-Google-Smtp-Source: AK7set8n8clAjhjAIPnKTQa9VaBpfld62j3dGkDnO56cLHZidR0LaEwxP/k6lfB/ptgqz+i5et/G X-Received: by 2002:a17:902:b781:b0:19c:eb9a:770d with SMTP id e1-20020a170902b78100b0019ceb9a770dmr1703730pls.53.1677850793618; Fri, 03 Mar 2023 05:39:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1677850793; cv=none; d=google.com; s=arc-20160816; b=nZBxUFvwA/a7EzO15J8t5boJOcBDWPymwRJtKZQ1XG8Rn2aqOs7JRTFspUrBE4GrVw sPKNjozhf42J9uHnBvZj6LnfE8aNtBs+S6JVgukOPlEbv95ZYxELt3vMxpMT1HPpL0/W vps5VbStaixYWLSgvVkrmgCJr13inInVE40SfI6sGUQKalsYAFhTO+uJrxIGCbKLGLfs l1AAnH+9w40aZPMrf7MXuwMpUuuADzq7GTEf2JEI3rqbKpwDTDLaAjbdoHmgaVrf4ENO 5ToPlNDzuPI09zYzIXAT6paxEK8UBqlCsjModtHe6eJ3uyhGt03d7HWQMj/8gh/lbVuZ 6FMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gcUANUnPmLAEK+XIpTGTIqkpKyb9BeUNqm/80XJY5vg=; b=yl7WzlRYrbbL57O3gLv+bmpj2M9tJGzeydjTzylEnjTlvl5b87BvNgOcz70gDyJl59 Bw+tSw8g0KzPrYRPzL1sn+lsStnqgeCVEA8iZARIfucDn3SabXaNCMP0nhzVACnASj4I kRmG7e97H1tCd0RBYKn+2cJ1upcL1fgKVO2rdnQ6FihP+sCJuvYU01UrX9s6axsCDXZT sA4ODTCoGq+eP0Jx2JN+Jp3ewaVCViepUZZVklbZtCeTqiEL/9ytqx2+dnGJEp9TeXFC wJ99Y7nb3KBVC4u8+u7rUIXrwa6XFPKlTi2y/HUZPgPaAHD2hjK+fjYokk63IQZYLCsC dnAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=XkUA56V6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i19-20020a170902eb5300b0019acba4e8e7si546038pli.186.2023.03.03.05.39.36; Fri, 03 Mar 2023 05:39:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=XkUA56V6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231362AbjCCNjL (ORCPT <rfc822;davidbtadokoro@gmail.com> + 99 others); Fri, 3 Mar 2023 08:39:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231224AbjCCNif (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 3 Mar 2023 08:38:35 -0500 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3FC61448D for <linux-kernel@vger.kernel.org>; Fri, 3 Mar 2023 05:38:01 -0800 (PST) Received: by mail-pl1-x629.google.com with SMTP id y11so2702553plg.1 for <linux-kernel@vger.kernel.org>; Fri, 03 Mar 2023 05:38:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1677850678; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gcUANUnPmLAEK+XIpTGTIqkpKyb9BeUNqm/80XJY5vg=; b=XkUA56V6OSWXY471GkW4kVLn1PNkoP0yegLGy0Ue3fMxWyv3Opt/TrgEQ89v+uhM5l xzycoQ6aJh4rQndCAbi5StOxCsNhC1uLkGzrJVH8fQPAEE+dgI/RtCyFiTGLib8ygx8w me0SrFzXYuI3HmvPpXntl50OPSz36mtIOsoJdtYLB/bNvK8pCgnri3yMkGigOjoGdQta AuHx3b9azP0+z8OziaCUVR/bKUnsoshjlUEK/fsjgkv9UMbuuqzHJQDaSVb1wd59ogKx rGOlklA8Z5aWjEue6ZiIAkU6tT/BVcFOCZVMlp01uiSnAg/H8H06icOR3G0H8dgPPdTK ogmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1677850678; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gcUANUnPmLAEK+XIpTGTIqkpKyb9BeUNqm/80XJY5vg=; b=QW4O4JQL2RPC34A/T/PidQP9xyBUl13YeDHopIwHmdlcoroxvpCKfnivdTrROFoGED NObf2w5oZ5h6kSX4xNyi0wcNSztVQ6jVIvmcwur/7YV2TnHjQAcMSXKYwN7T83CG+WGa 3PcY5atH4Xutc1tKM4amO2Khi6B9+57eNRuaXXdi9EAdwtULZGFq/FSSBTpsVNzFWrc8 6HnlpwXidSjzHxQoS2i2zYHclbCOqKXod4QcLgcCIcJ/zKYGlQd6UK0OJe1C1tjHzVhM RYADLCDZRNLbrMYRfDzKVlly+o83qtuY+BAD/bOaxP2vjhJFboEhSGkG0ofULjA9ntK9 AbVA== X-Gm-Message-State: AO0yUKXqhH9mU17ZWozmCVStfRwcLXgqcRRcS4hd5z/et1H7RNWm0Se8 kikA3EIll8MbjgNCEzsb3GfAwg== X-Received: by 2002:a17:903:8cb:b0:19e:8e73:e977 with SMTP id lk11-20020a17090308cb00b0019e8e73e977mr2051813plb.67.1677850677984; Fri, 03 Mar 2023 05:37:57 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id m9-20020a170902768900b0019ac5d3ee9dsm1533125pll.157.2023.03.03.05.37.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 05:37:57 -0800 (PST) From: Sunil V L <sunilvl@ventanamicro.com> To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, "Rafael J . Wysocki" <rafael@kernel.org>, Len Brown <lenb@kernel.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Jonathan Corbet <corbet@lwn.net>, Anup Patel <apatel@ventanamicro.com>, Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@rivosinc.com>, 'Conor Dooley ' <conor.dooley@microchip.com>, Sunil V L <sunilvl@ventanamicro.com>, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com> Subject: [PATCH V3 13/20] RISC-V: cpu: Enable cpuinfo for ACPI systems Date: Fri, 3 Mar 2023 19:06:40 +0530 Message-Id: <20230303133647.845095-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com> References: <20230303133647.845095-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1759354074129189693?= X-GMAIL-MSGID: =?utf-8?q?1759354074129189693?= |
Series |
Add basic ACPI support for RISC-V
|
|
Commit Message
Sunil V L
March 3, 2023, 1:36 p.m. UTC
On ACPI based platforms, few details like ISA need to be read from the ACPI table. Enable cpuinfo on ACPI based systems. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> --- arch/riscv/kernel/cpu.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-)
Comments
On Fri, Mar 03, 2023 at 07:06:40PM +0530, Sunil V L wrote: > On ACPI based platforms, few details like ISA need to be read > from the ACPI table. Enable cpuinfo on ACPI based systems. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > --- > arch/riscv/kernel/cpu.c | 27 +++++++++++++++++++-------- > 1 file changed, 19 insertions(+), 8 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 8400f0cc9704..80101bf77dab 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -3,10 +3,12 @@ > * Copyright (C) 2012 Regents of the University of California > */ > > +#include <linux/acpi.h> > #include <linux/cpu.h> > #include <linux/init.h> > #include <linux/seq_file.h> > #include <linux/of.h> > +#include <asm/acpi.h> > #include <asm/csr.h> > #include <asm/hwcap.h> > #include <asm/sbi.h> > @@ -283,23 +285,32 @@ static void c_stop(struct seq_file *m, void *v) > static int c_show(struct seq_file *m, void *v) > { > unsigned long cpu_id = (unsigned long)v - 1; > - struct device_node *node = of_get_cpu_node(cpu_id, NULL); > struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); > + struct device_node *node; > const char *compat, *isa; > > seq_printf(m, "processor\t: %lu\n", cpu_id); > seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); > - if (!of_property_read_string(node, "riscv,isa", &isa)) > - print_isa(m, isa); > - print_mmu(m); > - if (!of_property_read_string(node, "compatible", &compat) > - && strcmp(compat, "riscv")) > - seq_printf(m, "uarch\t\t: %s\n", compat); > + > + if (acpi_disabled) { > + node = of_get_cpu_node(cpu_id, NULL); > + if (!of_property_read_string(node, "riscv,isa", &isa)) > + print_isa(m, isa); > + print_mmu(m); > + if (!of_property_read_string(node, "compatible", &compat) && > + strcmp(compat, "riscv")) > + seq_printf(m, "uarch\t\t: %s\n", compat); > + of_node_put(node); > + } else { > + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu_id), &isa)) > + print_isa(m, isa); > + print_mmu(m); > + } > + > seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); > seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); > seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); > seq_puts(m, "\n"); > - of_node_put(node); > > return 0; > } > -- > 2.34.1 > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
On Fri, Mar 03, 2023 at 07:06:40PM +0530, Sunil V L wrote: > On ACPI based platforms, few details like ISA need to be read > from the ACPI table. Enable cpuinfo on ACPI based systems. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > --- > arch/riscv/kernel/cpu.c | 27 +++++++++++++++++++-------- > 1 file changed, 19 insertions(+), 8 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 8400f0cc9704..80101bf77dab 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -3,10 +3,12 @@ > * Copyright (C) 2012 Regents of the University of California > */ > > +#include <linux/acpi.h> > #include <linux/cpu.h> > #include <linux/init.h> > #include <linux/seq_file.h> > #include <linux/of.h> > +#include <asm/acpi.h> > #include <asm/csr.h> > #include <asm/hwcap.h> > #include <asm/sbi.h> > @@ -283,23 +285,32 @@ static void c_stop(struct seq_file *m, void *v) > static int c_show(struct seq_file *m, void *v) > { > unsigned long cpu_id = (unsigned long)v - 1; > - struct device_node *node = of_get_cpu_node(cpu_id, NULL); > struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); > + struct device_node *node; > const char *compat, *isa; > > seq_printf(m, "processor\t: %lu\n", cpu_id); > seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); > - if (!of_property_read_string(node, "riscv,isa", &isa)) > - print_isa(m, isa); > - print_mmu(m); > - if (!of_property_read_string(node, "compatible", &compat) > - && strcmp(compat, "riscv")) > - seq_printf(m, "uarch\t\t: %s\n", compat); > + > + if (acpi_disabled) { > + node = of_get_cpu_node(cpu_id, NULL); > + if (!of_property_read_string(node, "riscv,isa", &isa)) > + print_isa(m, isa); > + print_mmu(m); > + if (!of_property_read_string(node, "compatible", &compat) && > + strcmp(compat, "riscv")) > + seq_printf(m, "uarch\t\t: %s\n", compat); > + of_node_put(node); While you're touching this stuff, would you mind decorating it with some whitespace between if statements? > + } else { > + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu_id), &isa)) > + print_isa(m, isa); > + print_mmu(m); I assume ACPI has no equivalent of the compatible from which to generate uarch? A note as to why this is not present in the commit message would likely be helpful to us ACPI-heathens. > + } > + > seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); > seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); > seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); > seq_puts(m, "\n"); > - of_node_put(node); > > return 0; > } > -- > 2.34.1 >
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 8400f0cc9704..80101bf77dab 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -3,10 +3,12 @@ * Copyright (C) 2012 Regents of the University of California */ +#include <linux/acpi.h> #include <linux/cpu.h> #include <linux/init.h> #include <linux/seq_file.h> #include <linux/of.h> +#include <asm/acpi.h> #include <asm/csr.h> #include <asm/hwcap.h> #include <asm/sbi.h> @@ -283,23 +285,32 @@ static void c_stop(struct seq_file *m, void *v) static int c_show(struct seq_file *m, void *v) { unsigned long cpu_id = (unsigned long)v - 1; - struct device_node *node = of_get_cpu_node(cpu_id, NULL); struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); + struct device_node *node; const char *compat, *isa; seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); - if (!of_property_read_string(node, "riscv,isa", &isa)) - print_isa(m, isa); - print_mmu(m); - if (!of_property_read_string(node, "compatible", &compat) - && strcmp(compat, "riscv")) - seq_printf(m, "uarch\t\t: %s\n", compat); + + if (acpi_disabled) { + node = of_get_cpu_node(cpu_id, NULL); + if (!of_property_read_string(node, "riscv,isa", &isa)) + print_isa(m, isa); + print_mmu(m); + if (!of_property_read_string(node, "compatible", &compat) && + strcmp(compat, "riscv")) + seq_printf(m, "uarch\t\t: %s\n", compat); + of_node_put(node); + } else { + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu_id), &isa)) + print_isa(m, isa); + print_mmu(m); + } + seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); seq_puts(m, "\n"); - of_node_put(node); return 0; }